1 /* 2 * Generic VGA registers. 3 */ 4 enum { 5 MiscW = 0x03C2, /* Miscellaneous Output (W) */ 6 MiscR = 0x03CC, /* Miscellaneous Output (R) */ 7 Status0 = 0x03C2, /* Input status 0 (R) */ 8 Status1 = 0x03DA, /* Input Status 1 (R) */ 9 FeatureR = 0x03CA, /* Feature Control (R) */ 10 FeatureW = 0x03DA, /* Feature Control (W) */ 11 12 Seqx = 0x03C4, /* Sequencer Index, Data at Seqx+1 */ 13 Crtx = 0x03D4, /* CRT Controller Index, Data at Crtx+1 */ 14 Grx = 0x03CE, /* Graphics Controller Index, Data at Grx+1 */ 15 Attrx = 0x03C0, /* Attribute Controller Index and Data */ 16 17 PaddrW = 0x03C8, /* Palette Address Register, write */ 18 Pdata = 0x03C9, /* Palette Data Register */ 19 Pixmask = 0x03C6, /* Pixel Mask Register */ 20 PaddrR = 0x03C7, /* Palette Address Register, read */ 21 Pstatus = 0x03C7, /* DAC Status (RO) */ 22 23 Pcolours = 256, /* Palette */ 24 Red = 0, 25 Green = 1, 26 Blue = 2, 27 28 Pblack = 0x00, 29 Pwhite = 0xFF, 30 }; 31 32 enum { 33 RefFreq = 14318180, /* External Reference Clock frequency */ 34 VgaFreq0 = 25175000, 35 VgaFreq1 = 28322000, 36 }; 37 38 enum { 39 Namelen = 32, 40 }; 41 42 typedef struct Ctlr Ctlr; 43 typedef struct Vga Vga; 44 45 typedef struct Ctlr { 46 char name[Namelen+1]; 47 void (*snarf)(Vga*, Ctlr*); 48 void (*options)(Vga*, Ctlr*); 49 void (*init)(Vga*, Ctlr*); 50 void (*load)(Vga*, Ctlr*); 51 void (*dump)(Vga*, Ctlr*); 52 char* type; 53 54 ulong flag; 55 56 Ctlr* link; 57 } Ctlr; 58 59 enum { /* flag */ 60 Fsnarf = 0x00000001, /* snarf done */ 61 Foptions = 0x00000002, /* options done */ 62 Finit = 0x00000004, /* init done */ 63 Fload = 0x00000008, /* load done */ 64 Fdump = 0x00000010, /* dump done */ 65 Ferror = 0x00000020, /* error during snarf */ 66 67 Hpclk2x8 = 0x00000100, /* have double 8-bit mode */ 68 Upclk2x8 = 0x00000200, /* use double 8-bit mode */ 69 Henhanced = 0x00000400, /* have enhanced mode */ 70 Uenhanced = 0x00000800, /* use enhanced mode */ 71 Hpvram = 0x00001000, /* have parallel VRAM */ 72 Upvram = 0x00002000, /* use parallel VRAM */ 73 Hextsid = 0x00004000, /* have external SID mode */ 74 Uextsid = 0x00008000, /* use external SID mode */ 75 Hclk2 = 0x00010000, /* have clock-doubler */ 76 Uclk2 = 0x00020000, /* use clock-doubler */ 77 Hlinear = 0x00040000, /* have linear-address mode */ 78 Ulinear = 0x00080000, /* use linear-address mode */ 79 Hclkdiv = 0x00100000, /* have a clock-divisor */ 80 Uclkdiv = 0x00200000, /* use clock-divisor */ 81 Hsid32 = 0x00400000, /* have a 32-bit (as opposed to 64-bit) SID */ 82 }; 83 84 typedef struct Attr Attr; 85 typedef struct Attr { 86 char* attr; 87 char* val; 88 89 Attr* next; 90 } Attr; 91 92 typedef struct Mode { 93 char type[Namelen+1]; /* monitor type e.g. "vs1782" */ 94 char size[Namelen+1]; /* size e.g. "1376x1024x8" */ 95 char chan[Namelen+1]; /* channel descriptor, e.g. "m8" or "r8g8b8a8" */ 96 char name[Namelen+1]; /* optional */ 97 98 int frequency; /* Dot Clock (MHz) */ 99 int deffrequency; /* Default dot clock if calculation can't be done */ 100 int x; /* Horizontal Display End (Crt01), from .size[] */ 101 int y; /* Vertical Display End (Crt18), from .size[] */ 102 int z; /* depth, from .size[] */ 103 104 int ht; /* Horizontal Total (Crt00) */ 105 int shb; /* Start Horizontal Blank (Crt02) */ 106 int ehb; /* End Horizontal Blank (Crt03) */ 107 108 int shs; /* optional Start Horizontal Sync (Crt04) */ 109 int ehs; /* optional End Horizontal Sync (Crt05) */ 110 111 int vt; /* Vertical Total (Crt06) */ 112 int vrs; /* Vertical Retrace Start (Crt10) */ 113 int vre; /* Vertical Retrace End (Crt11) */ 114 115 int vbs; /* optional Vertical Blank Start */ 116 int vbe; /* optional Vertical Blank End */ 117 118 ulong videobw; 119 120 char hsync; 121 char vsync; 122 char interlace; 123 124 Attr* attr; 125 } Mode; 126 127 /* 128 * The sizes of the register sets are large as many SVGA and GUI chips have extras. 129 * The Crt registers are ushorts in order to keep overflow bits handy. 130 * The clock elements are used for communication between the VGA, RAMDAC and clock chips; 131 * they can use them however they like, it's assumed they will be used compatibly. 132 * 133 * The mode->x, mode->y coordinates are the physical size of the screen. 134 * Virtx and virty are the coordinates of the underlying memory image. 135 * This can be used to implement panning around a larger screen or to cope 136 * with chipsets that need the in-memory pixel line width to be a round number. 137 * For example, virge.c uses this because the Savage chipset needs the pixel 138 * width to be a multiple of 16. Also, mga2164w.c needs the pixel width 139 * to be a multiple of 128. 140 * 141 * Vga->panning differentiates between these two uses of virtx, virty. 142 * 143 * (14 October 2001, rsc) Most drivers don't know the difference between 144 * mode->x and virtx, a bug that should be corrected. Vga.c, virge.c, and 145 * mga2164w.c know. For the others, the computation that sets crt[0x13] 146 * should use virtx instead of mode->x (and maybe other places change too, 147 * dependent on the driver). 148 */ 149 typedef struct Vga { 150 uchar misc; 151 uchar feature; 152 uchar sequencer[256]; 153 ushort crt[256]; 154 uchar graphics[256]; 155 uchar attribute[256]; 156 uchar pixmask; 157 uchar pstatus; 158 uchar palette[Pcolours][3]; 159 160 ulong f[2]; /* clock */ 161 ulong d[2]; 162 ulong i[2]; 163 ulong m[2]; 164 ulong n[2]; 165 ulong p[2]; 166 ulong q[2]; 167 ulong r[2]; 168 169 ulong vma; /* video memory linear-address alignment */ 170 ulong vmb; /* video memory linear-address base */ 171 ulong apz; /* aperture size */ 172 ulong vmz; /* video memory size */ 173 174 ulong membw; /* memory bandwidth, MB/s */ 175 176 long offset; /* BIOS string offset */ 177 char* bios; /* matching BIOS string */ 178 Pcidev* pci; /* matching PCI device if any */ 179 180 Mode* mode; 181 182 ulong virtx; /* resolution of virtual screen */ 183 ulong virty; 184 185 int panning; /* pan the virtual screen */ 186 187 Ctlr* ctlr; 188 Ctlr* ramdac; 189 Ctlr* clock; 190 Ctlr* hwgc; 191 Ctlr* vesa; 192 Ctlr* link; 193 int linear; 194 Attr* attr; 195 196 void* private; 197 } Vga; 198 199 /* 3dfx.c */ 200 extern Ctlr tdfx; 201 extern Ctlr tdfxhwgc; 202 203 /* ark2000pv.c */ 204 extern Ctlr ark2000pv; 205 extern Ctlr ark2000pvhwgc; 206 207 /* att20c49x.c */ 208 extern Ctlr att20c490; 209 extern Ctlr att20c491; 210 extern Ctlr att20c492; 211 212 /* att21c498.c */ 213 extern uchar attdaci(uchar); 214 extern void attdaco(uchar, uchar); 215 extern Ctlr att21c498; 216 217 /* bt485.c */ 218 extern uchar bt485i(uchar); 219 extern void bt485o(uchar, uchar); 220 extern Ctlr bt485; 221 222 /* ch9294.c */ 223 extern Ctlr ch9294; 224 225 /* clgd542x.c */ 226 extern void clgd54xxclock(Vga*, Ctlr*); 227 extern Ctlr clgd542x; 228 extern Ctlr clgd542xhwgc; 229 230 /* clgd546x.c */ 231 extern Ctlr clgd546x; 232 extern Ctlr clgd546xhwgc; 233 234 /* ct65540.c */ 235 extern Ctlr ct65540; 236 extern Ctlr ct65545; 237 extern Ctlr ct65545hwgc; 238 239 /* cyber938x.c */ 240 extern Ctlr cyber938x; 241 extern Ctlr cyber938xhwgc; 242 243 /* data.c */ 244 extern int cflag; 245 extern int dflag; 246 extern Ctlr *ctlrs[]; 247 extern ushort dacxreg[4]; 248 249 /* db.c */ 250 extern char* dbattr(Attr*, char*); 251 extern int dbctlr(char*, Vga*); 252 extern Mode* dbmode(char*, char*, char*); 253 extern void dbdumpmode(Mode*); 254 255 /* error.c */ 256 extern void error(char*, ...); 257 extern void trace(char*, ...); 258 extern int vflag, Vflag; 259 260 /* et4000.c */ 261 extern Ctlr et4000; 262 263 /* et4000hwgc.c */ 264 extern Ctlr et4000hwgc; 265 266 /* hiqvideo.c */ 267 extern Ctlr hiqvideo; 268 extern Ctlr hiqvideohwgc; 269 270 /* i81x.c */ 271 extern Ctlr i81x; 272 extern Ctlr i81xhwgc; 273 274 /* ibm8514.c */ 275 extern Ctlr ibm8514; 276 277 /* icd2061a.c */ 278 extern Ctlr icd2061a; 279 280 /* ics2494.c */ 281 extern Ctlr ics2494; 282 extern Ctlr ics2494a; 283 284 /* ics534x.c */ 285 extern Ctlr ics534x; 286 287 /* io.c */ 288 extern uchar inportb(long); 289 extern void outportb(long, uchar); 290 extern ushort inportw(long); 291 extern void outportw(long, ushort); 292 extern ulong inportl(long); 293 extern void outportl(long, ulong); 294 extern char* vgactlr(char*, char*); 295 extern void vgactlw(char*, char*); 296 extern char* readbios(long, long); 297 extern void dumpbios(long); 298 extern void error(char*, ...); 299 extern void* alloc(ulong); 300 extern void printitem(char*, char*); 301 extern void printreg(ulong); 302 extern void printflag(ulong); 303 extern void setpalette(int, int, int, int); 304 extern int curprintindex; 305 306 /* mach32.c */ 307 extern Ctlr mach32; 308 309 /* mach64.c */ 310 extern Ctlr mach64; 311 312 /* mach64xx.c */ 313 extern Ctlr mach64xx; 314 extern Ctlr mach64xxhwgc; 315 316 /* main.c */ 317 extern char* chanstr[]; 318 extern void resyncinit(Vga*, Ctlr*, ulong, ulong); 319 extern void sequencer(Vga*, int); 320 extern void main(int, char*[]); 321 Biobuf stdout; 322 323 /* mga2164w.c */ 324 extern Ctlr mga2164w; 325 extern Ctlr mga2164whwgc; 326 327 /* neomagic.c */ 328 extern Ctlr neomagic; 329 extern Ctlr neomagichwgc; 330 331 /* nvidia.c */ 332 extern Ctlr nvidia; 333 extern Ctlr nvidiahwgc; 334 335 /* radeon.c */ 336 extern Ctlr radeon; 337 extern Ctlr radeonhwgc; 338 339 /* palette.c */ 340 extern Ctlr palette; 341 342 /* pci.c */ 343 typedef struct Pcidev Pcidev; 344 345 extern int pcicfgr8(Pcidev*, int); 346 extern int pcicfgr16(Pcidev*, int); 347 extern int pcicfgr32(Pcidev*, int); 348 extern void pcicfgw8(Pcidev*, int, int); 349 extern void pcicfgw16(Pcidev*, int, int); 350 extern void pcicfgw32(Pcidev*, int, int); 351 extern void pcihinv(Pcidev*); 352 extern Pcidev* pcimatch(Pcidev*, int, int); 353 354 /* rgb524.c */ 355 extern Ctlr rgb524; 356 357 /* rgb524mn.c */ 358 extern uchar (*rgb524mnxi)(Vga*, int); 359 extern void (*rgb524mnxo)(Vga*, int, uchar); 360 extern Ctlr rgb524mn; 361 362 /* s3801.c */ 363 extern Ctlr s3801; 364 extern Ctlr s3805; 365 366 /* s3928.c */ 367 extern Ctlr s3928; 368 369 /* s3clock.c */ 370 extern Ctlr s3clock; 371 372 /* s3generic.c */ 373 extern Ctlr s3generic; 374 375 /* s3hwgc.c */ 376 extern Ctlr bt485hwgc; 377 extern Ctlr rgb524hwgc; 378 extern Ctlr s3hwgc; 379 extern Ctlr tvp3020hwgc; 380 extern Ctlr tvp3026hwgc; 381 382 /* sc15025.c */ 383 extern Ctlr sc15025; 384 385 /* stg1702.c */ 386 extern Ctlr stg1702; 387 388 /* t2r4.c */ 389 extern Ctlr t2r4; 390 extern Ctlr t2r4hwgc; 391 392 /* trio64.c */ 393 extern void trio64clock(Vga*, Ctlr*); 394 extern Ctlr trio64; 395 396 /* tvp3020.c */ 397 extern uchar tvp3020i(uchar); 398 extern uchar tvp3020xi(uchar); 399 extern void tvp3020o(uchar, uchar); 400 extern void tvp3020xo(uchar, uchar); 401 extern Ctlr tvp3020; 402 403 /* tvp3025.c */ 404 extern Ctlr tvp3025; 405 406 /* tvp3025clock.c */ 407 extern Ctlr tvp3025clock; 408 409 /* tvp3026.c */ 410 extern uchar tvp3026xi(uchar); 411 extern void tvp3026xo(uchar, uchar); 412 extern Ctlr tvp3026; 413 414 /* tvp3026clock.c */ 415 extern Ctlr tvp3026clock; 416 417 /* vga.c */ 418 extern uchar vgai(long); 419 extern uchar vgaxi(long, uchar); 420 extern void vgao(long, uchar); 421 extern void vgaxo(long, uchar, uchar); 422 extern Ctlr generic; 423 424 /* vesa.c */ 425 extern Ctlr vesa; 426 extern Ctlr softhwgc; /* has to go somewhere */ 427 extern int dbvesa(Vga*); 428 extern Mode *dbvesamode(char*); 429 extern void vesatextmode(void); 430 431 /* virge.c */ 432 extern Ctlr virge; 433 434 /* vision864.c */ 435 extern Ctlr vision864; 436 437 /* vision964.c */ 438 extern Ctlr vision964; 439 440 /* vision968.c */ 441 extern Ctlr vision968; 442 443 /* vmware.c */ 444 extern Ctlr vmware; 445 extern Ctlr vmwarehwgc; 446 447 /* w30c516.c */ 448 extern Ctlr w30c516; 449 450 /* mga4xx.c */ 451 extern Ctlr mga4xx; 452 extern Ctlr mga4xxhwgc; 453 454 #pragma varargck argpos error 1 455 #pragma varargck argpos trace 1 456