xref: /netbsd-src/sys/arch/aarch64/include/locore.h (revision 9feefd4bbce831ff289c4d97f47eec470392c474)
1 /* $NetBSD: locore.h,v 1.9 2021/03/01 11:29:14 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2014 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Matt Thomas of 3am Software Foundry.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _AARCH64_LOCORE_H_
33 #define _AARCH64_LOCORE_H_
34 
35 #ifdef __aarch64__
36 
37 #ifdef _KERNEL_OPT
38 #include "opt_multiprocessor.h"
39 #endif
40 
41 #ifdef _LOCORE
42 
43 #define ENABLE_INTERRUPT	\
44 	msr daifclr, #((DAIF_I|DAIF_F) >> DAIF_SETCLR_SHIFT)
45 #define DISABLE_INTERRUPT	\
46 	msr daifset, #((DAIF_I|DAIF_F) >> DAIF_SETCLR_SHIFT)
47 
48 #else /* _LOCORE */
49 
50 #include <sys/types.h>
51 
52 #include <aarch64/armreg.h>
53 #include <aarch64/machdep.h>	/* arm32 compat */
54 
55 /* for compatibility arch/arm */
56 #define I32_bit			DAIF_I
57 #define F32_bit			DAIF_F
58 #define cpsie(psw)		daif_enable((psw))
59 #define cpsid(psw)		daif_disable((psw))
60 
61 #define ENABLE_INTERRUPT()						\
62 	reg_daifclr_write((DAIF_I|DAIF_F) >> DAIF_SETCLR_SHIFT)
63 #define DISABLE_INTERRUPT()						\
64 	reg_daifset_write((DAIF_I|DAIF_F) >> DAIF_SETCLR_SHIFT)
65 #define DISABLE_INTERRUPT_SAVE()					\
66 	daif_disable(DAIF_I|DAIF_F)
67 
68 #define DAIF_MASK		(DAIF_D|DAIF_A|DAIF_I|DAIF_F)
69 
70 static inline void __unused
daif_enable(register_t psw)71 daif_enable(register_t psw)
72 {
73 	if (!__builtin_constant_p(psw)) {
74 		reg_daif_write(reg_daif_read() & ~psw);
75 	} else {
76 		reg_daifclr_write((psw & DAIF_MASK) >> DAIF_SETCLR_SHIFT);
77 	}
78 }
79 
80 static inline register_t __unused
daif_disable(register_t psw)81 daif_disable(register_t psw)
82 {
83 	register_t oldpsw = reg_daif_read();
84 	if ((oldpsw & psw) != psw) {
85 		if (!__builtin_constant_p(psw)) {
86 			reg_daif_write(oldpsw | psw);
87 		} else {
88 			reg_daifset_write((psw & DAIF_MASK) >> DAIF_SETCLR_SHIFT);
89 		}
90 	}
91 	return oldpsw;
92 }
93 
94 #endif /* _LOCORE */
95 
96 #elif defined(__arm__)
97 
98 #include <arm/locore.h>
99 
100 #endif /* __aarch64__/__arm__ */
101 
102 #endif /* _AARCH64_LOCORE_H_ */
103