xref: /llvm-project/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp (revision 51001f87f1b1136554a73228fac2bde9735b2d06)
1 //===-- X86MachObjectWriter.cpp - X86 Mach-O Writer -----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "MCTargetDesc/X86FixupKinds.h"
10 #include "MCTargetDesc/X86MCTargetDesc.h"
11 #include "llvm/ADT/Twine.h"
12 #include "llvm/BinaryFormat/MachO.h"
13 #include "llvm/MC/MCAsmInfo.h"
14 #include "llvm/MC/MCAsmInfoDarwin.h"
15 #include "llvm/MC/MCAssembler.h"
16 #include "llvm/MC/MCContext.h"
17 #include "llvm/MC/MCMachObjectWriter.h"
18 #include "llvm/MC/MCSectionMachO.h"
19 #include "llvm/MC/MCValue.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/Format.h"
22 
23 using namespace llvm;
24 
25 namespace {
26 class X86MachObjectWriter : public MCMachObjectTargetWriter {
27   bool recordScatteredRelocation(MachObjectWriter *Writer,
28                                  const MCAssembler &Asm,
29                                  const MCFragment *Fragment,
30                                  const MCFixup &Fixup,
31                                  MCValue Target,
32                                  unsigned Log2Size,
33                                  uint64_t &FixedValue);
34   void recordTLVPRelocation(MachObjectWriter *Writer,
35                             const MCAssembler &Asm,
36                             const MCFragment *Fragment,
37                             const MCFixup &Fixup,
38                             MCValue Target,
39                             uint64_t &FixedValue);
40 
41   void RecordX86Relocation(MachObjectWriter *Writer,
42                               const MCAssembler &Asm,
43                               const MCFragment *Fragment,
44                               const MCFixup &Fixup,
45                               MCValue Target,
46                               uint64_t &FixedValue);
47   void RecordX86_64Relocation(MachObjectWriter *Writer, MCAssembler &Asm,
48                               const MCFragment *Fragment, const MCFixup &Fixup,
49                               MCValue Target, uint64_t &FixedValue);
50 
51 public:
52   X86MachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
53       : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
54 
55   void recordRelocation(MachObjectWriter *Writer, MCAssembler &Asm,
56                         const MCFragment *Fragment, const MCFixup &Fixup,
57                         MCValue Target, uint64_t &FixedValue) override {
58     if (Writer->is64Bit())
59       RecordX86_64Relocation(Writer, Asm, Fragment, Fixup, Target, FixedValue);
60     else
61       RecordX86Relocation(Writer, Asm, Fragment, Fixup, Target, FixedValue);
62   }
63 };
64 } // namespace
65 
66 static bool isFixupKindRIPRel(unsigned Kind) {
67   return Kind == X86::reloc_riprel_4byte ||
68          Kind == X86::reloc_riprel_4byte_movq_load ||
69          Kind == X86::reloc_riprel_4byte_movq_load_rex2 ||
70          Kind == X86::reloc_riprel_4byte_relax ||
71          Kind == X86::reloc_riprel_4byte_relax_rex ||
72          Kind == X86::reloc_riprel_4byte_relax_rex2 ||
73          Kind == X86::reloc_riprel_4byte_relax_evex;
74 }
75 
76 static unsigned getFixupKindLog2Size(unsigned Kind) {
77   switch (Kind) {
78   default:
79     llvm_unreachable("invalid fixup kind!");
80   case FK_PCRel_1:
81   case FK_Data_1: return 0;
82   case FK_PCRel_2:
83   case FK_Data_2: return 1;
84   case FK_PCRel_4:
85     // FIXME: Remove these!!!
86   case X86::reloc_riprel_4byte:
87   case X86::reloc_riprel_4byte_relax:
88   case X86::reloc_riprel_4byte_relax_rex:
89   case X86::reloc_riprel_4byte_relax_rex2:
90   case X86::reloc_riprel_4byte_movq_load:
91   case X86::reloc_riprel_4byte_movq_load_rex2:
92   case X86::reloc_signed_4byte:
93   case X86::reloc_signed_4byte_relax:
94   case X86::reloc_branch_4byte_pcrel:
95   case X86::reloc_riprel_4byte_relax_evex:
96   case FK_Data_4: return 2;
97   case FK_Data_8: return 3;
98   }
99 }
100 
101 void X86MachObjectWriter::RecordX86_64Relocation(
102     MachObjectWriter *Writer, MCAssembler &Asm, const MCFragment *Fragment,
103     const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue) {
104   unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
105   unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind());
106   unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
107 
108   // See <reloc.h>.
109   uint32_t FixupOffset = Asm.getFragmentOffset(*Fragment) + Fixup.getOffset();
110   uint32_t FixupAddress =
111       Writer->getFragmentAddress(Asm, Fragment) + Fixup.getOffset();
112   int64_t Value = 0;
113   unsigned Index = 0;
114   unsigned IsExtern = 0;
115   unsigned Type = 0;
116   const MCSymbol *RelSymbol = nullptr;
117 
118   Value = Target.getConstant();
119 
120   if (IsPCRel) {
121     // Compensate for the relocation offset, Darwin x86_64 relocations only have
122     // the addend and appear to have attempted to define it to be the actual
123     // expression addend without the PCrel bias. However, instructions with data
124     // following the relocation are not accommodated for (see comment below
125     // regarding SIGNED{1,2,4}), so it isn't exactly that either.
126     Value += 1LL << Log2Size;
127   }
128 
129   if (Target.isAbsolute()) { // constant
130     // SymbolNum of 0 indicates the absolute section.
131     Type = MachO::X86_64_RELOC_UNSIGNED;
132 
133     // FIXME: I believe this is broken, I don't think the linker can understand
134     // it. I think it would require a local relocation, but I'm not sure if that
135     // would work either. The official way to get an absolute PCrel relocation
136     // is to use an absolute symbol (which we don't support yet).
137     if (IsPCRel) {
138       IsExtern = 1;
139       Type = MachO::X86_64_RELOC_BRANCH;
140     }
141   } else if (Target.getSymB()) { // A - B + constant
142     const MCSymbol *A = &Target.getSymA()->getSymbol();
143     if (A->isTemporary())
144       A = &Writer->findAliasedSymbol(*A);
145     const MCSymbol *A_Base = Writer->getAtom(*A);
146 
147     const MCSymbol *B = &Target.getSymB()->getSymbol();
148     if (B->isTemporary())
149       B = &Writer->findAliasedSymbol(*B);
150     const MCSymbol *B_Base = Writer->getAtom(*B);
151 
152     // Neither symbol can be modified.
153     if (Target.getSymA()->getKind() != MCSymbolRefExpr::VK_None) {
154       Asm.getContext().reportError(Fixup.getLoc(),
155                                    "unsupported relocation of modified symbol");
156       return;
157     }
158 
159     // We don't support PCrel relocations of differences. Darwin 'as' doesn't
160     // implement most of these correctly.
161     if (IsPCRel) {
162       Asm.getContext().reportError(
163           Fixup.getLoc(), "unsupported pc-relative relocation of difference");
164       return;
165     }
166 
167     // The support for the situation where one or both of the symbols would
168     // require a local relocation is handled just like if the symbols were
169     // external.  This is certainly used in the case of debug sections where the
170     // section has only temporary symbols and thus the symbols don't have base
171     // symbols.  This is encoded using the section ordinal and non-extern
172     // relocation entries.
173 
174     // Darwin 'as' doesn't emit correct relocations for this (it ends up with a
175     // single SIGNED relocation); reject it for now.  Except the case where both
176     // symbols don't have a base, equal but both NULL.
177     if (A_Base == B_Base && A_Base) {
178       Asm.getContext().reportError(
179           Fixup.getLoc(), "unsupported relocation with identical base");
180       return;
181     }
182 
183     // A subtraction expression where either symbol is undefined is a
184     // non-relocatable expression.
185     if (A->isUndefined() || B->isUndefined()) {
186       StringRef Name = A->isUndefined() ? A->getName() : B->getName();
187       Asm.getContext().reportError(Fixup.getLoc(),
188         "unsupported relocation with subtraction expression, symbol '" +
189         Name + "' can not be undefined in a subtraction expression");
190       return;
191     }
192 
193     Value += Writer->getSymbolAddress(*A, Asm) -
194              (!A_Base ? 0 : Writer->getSymbolAddress(*A_Base, Asm));
195     Value -= Writer->getSymbolAddress(*B, Asm) -
196              (!B_Base ? 0 : Writer->getSymbolAddress(*B_Base, Asm));
197 
198     if (!A_Base)
199       Index = A->getFragment()->getParent()->getOrdinal() + 1;
200     Type = MachO::X86_64_RELOC_UNSIGNED;
201 
202     MachO::any_relocation_info MRE;
203     MRE.r_word0 = FixupOffset;
204     MRE.r_word1 =
205         (Index << 0) | (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
206     Writer->addRelocation(A_Base, Fragment->getParent(), MRE);
207 
208     if (B_Base)
209       RelSymbol = B_Base;
210     else
211       Index = B->getFragment()->getParent()->getOrdinal() + 1;
212     Type = MachO::X86_64_RELOC_SUBTRACTOR;
213   } else {
214     const MCSymbol *Symbol = &Target.getSymA()->getSymbol();
215     if (Symbol->isTemporary() && Value) {
216       const MCSection &Sec = Symbol->getSection();
217       if (!MCAsmInfoDarwin::isSectionAtomizableBySymbols(Sec))
218         Symbol->setUsedInReloc();
219     }
220     RelSymbol = Writer->getAtom(*Symbol);
221 
222     // Relocations inside debug sections always use local relocations when
223     // possible. This seems to be done because the debugger doesn't fully
224     // understand x86_64 relocation entries, and expects to find values that
225     // have already been fixed up.
226     if (Symbol->isInSection()) {
227       const MCSectionMachO &Section =
228           static_cast<const MCSectionMachO &>(*Fragment->getParent());
229       if (Section.hasAttribute(MachO::S_ATTR_DEBUG))
230         RelSymbol = nullptr;
231     }
232 
233     // x86_64 almost always uses external relocations, except when there is no
234     // symbol to use as a base address (a local symbol with no preceding
235     // non-local symbol).
236     if (RelSymbol) {
237       // Add the local offset, if needed.
238       if (RelSymbol != Symbol)
239         Value += Asm.getSymbolOffset(*Symbol) - Asm.getSymbolOffset(*RelSymbol);
240     } else if (Symbol->isInSection() && !Symbol->isVariable()) {
241       // The index is the section ordinal (1-based).
242       Index = Symbol->getFragment()->getParent()->getOrdinal() + 1;
243       Value += Writer->getSymbolAddress(*Symbol, Asm);
244 
245       if (IsPCRel)
246         Value -= FixupAddress + (1 << Log2Size);
247     } else if (Symbol->isVariable()) {
248       const MCExpr *Value = Symbol->getVariableValue();
249       int64_t Res;
250       bool isAbs =
251           Value->evaluateAsAbsolute(Res, Asm, Writer->getSectionAddressMap());
252       if (isAbs) {
253         FixedValue = Res;
254         return;
255       } else {
256         Asm.getContext().reportError(Fixup.getLoc(),
257                                      "unsupported relocation of variable '" +
258                                          Symbol->getName() + "'");
259         return;
260       }
261     } else {
262       Asm.getContext().reportError(
263           Fixup.getLoc(), "unsupported relocation of undefined symbol '" +
264                               Symbol->getName() + "'");
265       return;
266     }
267 
268     MCSymbolRefExpr::VariantKind Modifier = Target.getSymA()->getKind();
269     if (IsPCRel) {
270       if (IsRIPRel) {
271         if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
272           // x86_64 distinguishes movq foo@GOTPCREL so that the linker can
273           // rewrite the movq to an leaq at link time if the symbol ends up in
274           // the same linkage unit.
275           if (Fixup.getTargetKind() == X86::reloc_riprel_4byte_movq_load)
276             Type = MachO::X86_64_RELOC_GOT_LOAD;
277           else
278             Type = MachO::X86_64_RELOC_GOT;
279         }  else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
280           Type = MachO::X86_64_RELOC_TLV;
281         }  else if (Modifier != MCSymbolRefExpr::VK_None) {
282           Asm.getContext().reportError(
283               Fixup.getLoc(), "unsupported symbol modifier in relocation");
284           return;
285         } else {
286           Type = MachO::X86_64_RELOC_SIGNED;
287 
288           // The Darwin x86_64 relocation format has a problem where it cannot
289           // encode an address (L<foo> + <constant>) which is outside the atom
290           // containing L<foo>. Generally, this shouldn't occur but it does
291           // happen when we have a RIPrel instruction with data following the
292           // relocation entry (e.g., movb $012, L0(%rip)). Even with the PCrel
293           // adjustment Darwin x86_64 uses, the offset is still negative and the
294           // linker has no way to recognize this.
295           //
296           // To work around this, Darwin uses several special relocation types
297           // to indicate the offsets. However, the specification or
298           // implementation of these seems to also be incomplete; they should
299           // adjust the addend as well based on the actual encoded instruction
300           // (the additional bias), but instead appear to just look at the final
301           // offset.
302           switch (-(Target.getConstant() + (1LL << Log2Size))) {
303           case 1: Type = MachO::X86_64_RELOC_SIGNED_1; break;
304           case 2: Type = MachO::X86_64_RELOC_SIGNED_2; break;
305           case 4: Type = MachO::X86_64_RELOC_SIGNED_4; break;
306           }
307         }
308       } else {
309         if (Modifier != MCSymbolRefExpr::VK_None) {
310           Asm.getContext().reportError(
311               Fixup.getLoc(),
312               "unsupported symbol modifier in branch relocation");
313           return;
314         }
315 
316         Type = MachO::X86_64_RELOC_BRANCH;
317       }
318     } else {
319       if (Modifier == MCSymbolRefExpr::VK_GOT) {
320         Type = MachO::X86_64_RELOC_GOT;
321       } else if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
322         // GOTPCREL is allowed as a modifier on non-PCrel instructions, in which
323         // case all we do is set the PCrel bit in the relocation entry; this is
324         // used with exception handling, for example. The source is required to
325         // include any necessary offset directly.
326         Type = MachO::X86_64_RELOC_GOT;
327         IsPCRel = 1;
328       } else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
329         Asm.getContext().reportError(
330             Fixup.getLoc(), "TLVP symbol modifier should have been rip-rel");
331         return;
332       } else if (Modifier != MCSymbolRefExpr::VK_None) {
333         Asm.getContext().reportError(
334             Fixup.getLoc(), "unsupported symbol modifier in relocation");
335         return;
336       } else {
337         Type = MachO::X86_64_RELOC_UNSIGNED;
338         if (Fixup.getTargetKind() == X86::reloc_signed_4byte) {
339           Asm.getContext().reportError(
340               Fixup.getLoc(),
341               "32-bit absolute addressing is not supported in 64-bit mode");
342           return;
343         }
344       }
345     }
346   }
347 
348   // x86_64 always writes custom values into the fixups.
349   FixedValue = Value;
350 
351   // struct relocation_info (8 bytes)
352   MachO::any_relocation_info MRE;
353   MRE.r_word0 = FixupOffset;
354   MRE.r_word1 = (Index << 0) | (IsPCRel << 24) | (Log2Size << 25) |
355                 (IsExtern << 27) | (Type << 28);
356   Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
357 }
358 
359 bool X86MachObjectWriter::recordScatteredRelocation(MachObjectWriter *Writer,
360                                                     const MCAssembler &Asm,
361                                                     const MCFragment *Fragment,
362                                                     const MCFixup &Fixup,
363                                                     MCValue Target,
364                                                     unsigned Log2Size,
365                                                     uint64_t &FixedValue) {
366   uint64_t OriginalFixedValue = FixedValue;
367   uint32_t FixupOffset = Asm.getFragmentOffset(*Fragment) + Fixup.getOffset();
368   unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
369   unsigned Type = MachO::GENERIC_RELOC_VANILLA;
370 
371   // See <reloc.h>.
372   const MCSymbol *A = &Target.getSymA()->getSymbol();
373 
374   if (!A->getFragment()) {
375     Asm.getContext().reportError(
376         Fixup.getLoc(),
377         "symbol '" + A->getName() +
378             "' can not be undefined in a subtraction expression");
379     return false;
380   }
381 
382   uint32_t Value = Writer->getSymbolAddress(*A, Asm);
383   uint64_t SecAddr = Writer->getSectionAddress(A->getFragment()->getParent());
384   FixedValue += SecAddr;
385   uint32_t Value2 = 0;
386 
387   if (const MCSymbolRefExpr *B = Target.getSymB()) {
388     const MCSymbol *SB = &B->getSymbol();
389 
390     if (!SB->getFragment()) {
391       Asm.getContext().reportError(
392           Fixup.getLoc(),
393           "symbol '" + SB->getName() +
394               "' can not be undefined in a subtraction expression");
395       return false;
396     }
397 
398     // Select the appropriate difference relocation type.
399     //
400     // Note that there is no longer any semantic difference between these two
401     // relocation types from the linkers point of view, this is done solely for
402     // pedantic compatibility with 'as'.
403     Type = A->isExternal() ? (unsigned)MachO::GENERIC_RELOC_SECTDIFF
404                            : (unsigned)MachO::GENERIC_RELOC_LOCAL_SECTDIFF;
405     Value2 = Writer->getSymbolAddress(*SB, Asm);
406     FixedValue -= Writer->getSectionAddress(SB->getFragment()->getParent());
407   }
408 
409   // Relocations are written out in reverse order, so the PAIR comes first.
410   if (Type == MachO::GENERIC_RELOC_SECTDIFF ||
411       Type == MachO::GENERIC_RELOC_LOCAL_SECTDIFF) {
412     // If the offset is too large to fit in a scattered relocation,
413     // we're hosed. It's an unfortunate limitation of the MachO format.
414     if (FixupOffset > 0xffffff) {
415       char Buffer[32];
416       format("0x%x", FixupOffset).print(Buffer, sizeof(Buffer));
417       Asm.getContext().reportError(Fixup.getLoc(),
418                          Twine("Section too large, can't encode "
419                                 "r_address (") + Buffer +
420                          ") into 24 bits of scattered "
421                          "relocation entry.");
422       return false;
423     }
424 
425     MachO::any_relocation_info MRE;
426     MRE.r_word0 = ((0                         <<  0) | // r_address
427                    (MachO::GENERIC_RELOC_PAIR << 24) | // r_type
428                    (Log2Size                  << 28) |
429                    (IsPCRel                   << 30) |
430                    MachO::R_SCATTERED);
431     MRE.r_word1 = Value2;
432     Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
433   } else {
434     // If the offset is more than 24-bits, it won't fit in a scattered
435     // relocation offset field, so we fall back to using a non-scattered
436     // relocation. This is a bit risky, as if the offset reaches out of
437     // the block and the linker is doing scattered loading on this
438     // symbol, things can go badly.
439     //
440     // Required for 'as' compatibility.
441     if (FixupOffset > 0xffffff) {
442       FixedValue = OriginalFixedValue;
443       return false;
444     }
445   }
446 
447   MachO::any_relocation_info MRE;
448   MRE.r_word0 = ((FixupOffset <<  0) |
449                  (Type        << 24) |
450                  (Log2Size    << 28) |
451                  (IsPCRel     << 30) |
452                  MachO::R_SCATTERED);
453   MRE.r_word1 = Value;
454   Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
455   return true;
456 }
457 
458 void X86MachObjectWriter::recordTLVPRelocation(MachObjectWriter *Writer,
459                                                const MCAssembler &Asm,
460                                                const MCFragment *Fragment,
461                                                const MCFixup &Fixup,
462                                                MCValue Target,
463                                                uint64_t &FixedValue) {
464   const MCSymbolRefExpr *SymA = Target.getSymA();
465   assert(SymA->getKind() == MCSymbolRefExpr::VK_TLVP && !is64Bit() &&
466          "Should only be called with a 32-bit TLVP relocation!");
467 
468   unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
469   uint32_t Value = Asm.getFragmentOffset(*Fragment) + Fixup.getOffset();
470   unsigned IsPCRel = 0;
471 
472   // We're only going to have a second symbol in pic mode and it'll be a
473   // subtraction from the picbase. For 32-bit pic the addend is the difference
474   // between the picbase and the next address.  For 32-bit static the addend is
475   // zero.
476   if (auto *SymB = Target.getSymB()) {
477     // If this is a subtraction then we're pcrel.
478     uint32_t FixupAddress =
479         Writer->getFragmentAddress(Asm, Fragment) + Fixup.getOffset();
480     IsPCRel = 1;
481     FixedValue = FixupAddress -
482                  Writer->getSymbolAddress(SymB->getSymbol(), Asm) +
483                  Target.getConstant();
484     FixedValue += 1ULL << Log2Size;
485   } else {
486     FixedValue = 0;
487   }
488 
489   // struct relocation_info (8 bytes)
490   MachO::any_relocation_info MRE;
491   MRE.r_word0 = Value;
492   MRE.r_word1 =
493       (IsPCRel << 24) | (Log2Size << 25) | (MachO::GENERIC_RELOC_TLV << 28);
494   Writer->addRelocation(&SymA->getSymbol(), Fragment->getParent(), MRE);
495 }
496 
497 void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
498                                               const MCAssembler &Asm,
499                                               const MCFragment *Fragment,
500                                               const MCFixup &Fixup,
501                                               MCValue Target,
502                                               uint64_t &FixedValue) {
503   unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
504   unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
505 
506   // If this is a 32-bit TLVP reloc it's handled a bit differently.
507   if (Target.getSymA() &&
508       Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP) {
509     recordTLVPRelocation(Writer, Asm, Fragment, Fixup, Target, FixedValue);
510     return;
511   }
512 
513   // If this is a difference or a defined symbol plus an offset, then we need a
514   // scattered relocation entry. Differences always require scattered
515   // relocations.
516   if (Target.getSymB()) {
517     recordScatteredRelocation(Writer, Asm, Fragment, Fixup, Target, Log2Size,
518                               FixedValue);
519     return;
520   }
521 
522   // Get the symbol data, if any.
523   const MCSymbol *A = nullptr;
524   if (Target.getSymA())
525     A = &Target.getSymA()->getSymbol();
526 
527   // If this is an internal relocation with an offset, it also needs a scattered
528   // relocation entry.
529   uint32_t Offset = Target.getConstant();
530   if (IsPCRel)
531     Offset += 1 << Log2Size;
532 
533   // Try to record the scattered relocation if needed. Fall back to non
534   // scattered if necessary (see comments in recordScatteredRelocation()
535   // for details).
536   if (Offset && A && !Writer->doesSymbolRequireExternRelocation(*A) &&
537       recordScatteredRelocation(Writer, Asm, Fragment, Fixup, Target, Log2Size,
538                                 FixedValue))
539     return;
540 
541   // See <reloc.h>.
542   uint32_t FixupOffset = Asm.getFragmentOffset(*Fragment) + Fixup.getOffset();
543   unsigned Index = 0;
544   unsigned Type = 0;
545   const MCSymbol *RelSymbol = nullptr;
546 
547   if (Target.isAbsolute()) { // constant
548     // SymbolNum of 0 indicates the absolute section.
549     //
550     // FIXME: Currently, these are never generated (see code below). I cannot
551     // find a case where they are actually emitted.
552     Type = MachO::GENERIC_RELOC_VANILLA;
553   } else {
554     assert(A && "Unknown symbol data");
555 
556     // Resolve constant variables.
557     if (A->isVariable()) {
558       int64_t Res;
559       if (A->getVariableValue()->evaluateAsAbsolute(
560               Res, Asm, Writer->getSectionAddressMap())) {
561         FixedValue = Res;
562         return;
563       }
564     }
565 
566     // Check whether we need an external or internal relocation.
567     if (Writer->doesSymbolRequireExternRelocation(*A)) {
568       RelSymbol = A;
569       // For external relocations, make sure to offset the fixup value to
570       // compensate for the addend of the symbol address, if it was
571       // undefined. This occurs with weak definitions, for example.
572       if (!A->isUndefined())
573         FixedValue -= Asm.getSymbolOffset(*A);
574     } else {
575       // The index is the section ordinal (1-based).
576       const MCSection &Sec = A->getSection();
577       Index = Sec.getOrdinal() + 1;
578       FixedValue += Writer->getSectionAddress(&Sec);
579     }
580     if (IsPCRel)
581       FixedValue -= Writer->getSectionAddress(Fragment->getParent());
582 
583     Type = MachO::GENERIC_RELOC_VANILLA;
584   }
585 
586   // struct relocation_info (8 bytes)
587   MachO::any_relocation_info MRE;
588   MRE.r_word0 = FixupOffset;
589   MRE.r_word1 =
590       (Index << 0) | (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
591   Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
592 }
593 
594 std::unique_ptr<MCObjectTargetWriter>
595 llvm::createX86MachObjectWriter(bool Is64Bit, uint32_t CPUType,
596                                 uint32_t CPUSubtype) {
597   return std::make_unique<X86MachObjectWriter>(Is64Bit, CPUType, CPUSubtype);
598 }
599