Home
last modified time | relevance | path

Searched defs:clk_type (Results 1 – 16 of 16) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
H A Damdgpu_renoir_ppt.c230 static int renoir_get_dpm_clk_limited(struct smu_context *smu, enum smu_clk_type clk_type, in renoir_get_dpm_clk_limited()
244 enum smu_clk_type clk_type, char *buf) in renoir_print_clk_levels()
395 enum smu_clk_type clk_type, in renoir_get_current_clk_freq_by_table()
418 enum smu_clk_type clk_type; in renoir_force_dpm_limit_value() local
445 enum smu_clk_type clk_type; in renoir_unforce_dpm_levels() local
448 enum smu_clk_type clk_type; in renoir_unforce_dpm_levels() member
609 enum smu_clk_type clk_type, uint32_t mask) in renoir_force_clk_levels()
H A Drenoir_ppt.h35 #define GET_DPM_CUR_FREQ(table, clk_type, dpm_level, freq) \ argument
H A Damdgpu_smu.c227 int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, in smu_set_soft_freq_range()
242 int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, in smu_set_hard_freq_range()
278 int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, in smu_get_dpm_freq_range()
327 int smu_get_dpm_freq_by_index(struct smu_context *smu, enum smu_clk_type clk_type, in smu_get_dpm_freq_by_index()
361 int smu_get_dpm_level_count(struct smu_context *smu, enum smu_clk_type clk_type, in smu_get_dpm_level_count()
367 int smu_get_dpm_level_range(struct smu_context *smu, enum smu_clk_type clk_type, in smu_get_dpm_level_range()
396 bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type) in smu_clk_dpm_is_enabled()
1896 enum smu_clk_type clk_type, in smu_force_clk_levels()
2157 int smu_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) in smu_print_clk_levels()
2391 enum smu_clk_type clk_type, in smu_get_clock_by_type_with_latency()
H A Damdgpu_navi10_ppt.c716 enum smu_clk_type clk_type, in navi10_get_current_clk_freq_by_table()
735 static bool navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum smu_clk_type clk_type) in navi10_is_support_fine_grained_dpm()
764 enum smu_clk_type clk_type, char *buf) in navi10_print_clk_levels()
951 enum smu_clk_type clk_type, uint32_t mask) in navi10_force_clk_levels()
1014 enum smu_clk_type clk_type, in navi10_get_clock_by_type_with_latency()
1099 enum smu_clk_type clk_type; in navi10_force_dpm_limit_value() local
1126 enum smu_clk_type clk_type; in navi10_unforce_dpm_levels() local
H A Damdgpu_smu_v12_0.c379 int smu_v12_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, in smu_v12_0_get_dpm_ultimate_freq()
461 int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, in smu_v12_0_set_soft_freq_limited_range()
H A Dsmu_internal.h184 #define smu_get_current_clk_freq_by_table(smu, clk_type, value) \ argument
200 #define smu_get_dpm_clk_limited(smu, clk_type, dpm_level, freq) \ argument
203 #define smu_set_soft_freq_limited_range(smu, clk_type, min, max) \ argument
H A Damdgpu_vega20_ppt.c1282 enum smu_clk_type clk_type, uint32_t mask) in vega20_force_clk_levels()
1445 enum smu_clk_type clk_type, in vega20_get_clock_by_type_with_latency()
1737 enum smu_clk_type clk_type) in vega20_get_od_percentage()
2527 enum smu_clk_type clk_type, in vega20_set_od_percentage()
H A Damdgpu_smu_v11_0.c1319 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu_v11_0_display_clock_voltage_request() local
1769 int smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, in smu_v11_0_get_dpm_ultimate_freq()
1804 int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, in smu_v11_0_set_soft_freq_limited_range()
H A Damdgpu_arcturus_ppt.c1068 enum smu_clk_type clk_type, in arcturus_get_current_clk_freq_by_table()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c125 enum dm_pp_clock_type clk_type, in get_default_clock_levels()
338 enum dm_pp_clock_type clk_type, in dm_pp_get_clock_levels_by_type()
424 enum dm_pp_clock_type clk_type, in dm_pp_get_clock_levels_by_type_with_latency()
454 enum dm_pp_clock_type clk_type, in dm_pp_get_clock_levels_by_type_with_voltage()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
H A Ddm_services_types.h84 #define DC_DECODE_PP_CLOCK_TYPE(clk_type) \ argument
256 enum dm_pp_clock_type clk_type; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_atombios_crtc.c533 u32 freq, u8 clk_type, u8 clk_src) in amdgpu_atombios_crtc_set_dce_clock()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_smu10_hwmgr.c67 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu10_display_clock_voltage_request() local
H A Damdgpu_vega12_hwmgr.c1440 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega12_display_clock_voltage_request() local
H A Damdgpu_vega20_hwmgr.c2256 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega20_display_clock_voltage_request() local
H A Damdgpu_vega10_hwmgr.c3910 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega10_display_clock_voltage_request() local