xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/hwmgr_ppt.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: hwmgr_ppt.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2015 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  */
25 
26 #ifndef PP_HWMGR_PPT_H
27 #define PP_HWMGR_PPT_H
28 
29 #include "hardwaremanager.h"
30 #include "smumgr.h"
31 #include "atom-types.h"
32 
33 struct phm_ppt_v1_clock_voltage_dependency_record {
34 	uint32_t clk;
35 	uint8_t  vddInd;
36 	uint8_t  vddciInd;
37 	uint8_t  mvddInd;
38 	uint16_t vdd_offset;
39 	uint16_t vddc;
40 	uint16_t vddgfx;
41 	uint16_t vddci;
42 	uint16_t mvdd;
43 	uint8_t  phases;
44 	uint8_t  cks_enable;
45 	uint8_t  cks_voffset;
46 	uint32_t sclk_offset;
47 };
48 
49 typedef struct phm_ppt_v1_clock_voltage_dependency_record phm_ppt_v1_clock_voltage_dependency_record;
50 
51 struct phm_ppt_v1_clock_voltage_dependency_table {
52 	uint32_t count;                                            /* Number of entries. */
53 	phm_ppt_v1_clock_voltage_dependency_record entries[1];     /* Dynamically allocate count entries. */
54 };
55 
56 typedef struct phm_ppt_v1_clock_voltage_dependency_table phm_ppt_v1_clock_voltage_dependency_table;
57 
58 
59 /* Multimedia Clock Voltage Dependency records and table */
60 struct phm_ppt_v1_mm_clock_voltage_dependency_record {
61 	uint32_t  dclk;                                              /* UVD D-clock */
62 	uint32_t  vclk;                                              /* UVD V-clock */
63 	uint32_t  eclk;                                              /* VCE clock */
64 	uint32_t  aclk;                                              /* ACP clock */
65 	uint32_t  samclock;                                          /* SAMU clock */
66 	uint8_t	vddcInd;
67 	uint16_t vddgfx_offset;
68 	uint16_t vddc;
69 	uint16_t vddgfx;
70 	uint8_t phases;
71 };
72 typedef struct phm_ppt_v1_mm_clock_voltage_dependency_record phm_ppt_v1_mm_clock_voltage_dependency_record;
73 
74 struct phm_ppt_v1_mm_clock_voltage_dependency_table {
75 	uint32_t count;													/* Number of entries. */
76 	phm_ppt_v1_mm_clock_voltage_dependency_record entries[1];		/* Dynamically allocate count entries. */
77 };
78 typedef struct phm_ppt_v1_mm_clock_voltage_dependency_table phm_ppt_v1_mm_clock_voltage_dependency_table;
79 
80 struct phm_ppt_v1_voltage_lookup_record {
81 	uint16_t us_calculated;
82 	uint16_t us_vdd;												/* Base voltage */
83 	uint16_t us_cac_low;
84 	uint16_t us_cac_mid;
85 	uint16_t us_cac_high;
86 };
87 typedef struct phm_ppt_v1_voltage_lookup_record phm_ppt_v1_voltage_lookup_record;
88 
89 struct phm_ppt_v1_voltage_lookup_table {
90 	uint32_t count;
91 	phm_ppt_v1_voltage_lookup_record entries[1];    /* Dynamically allocate count entries. */
92 };
93 typedef struct phm_ppt_v1_voltage_lookup_table phm_ppt_v1_voltage_lookup_table;
94 
95 /* PCIE records and Table */
96 
97 struct phm_ppt_v1_pcie_record {
98 	uint8_t gen_speed;
99 	uint8_t lane_width;
100 	uint16_t usreserved;
101 	uint16_t reserved;
102 	uint32_t pcie_sclk;
103 };
104 typedef struct phm_ppt_v1_pcie_record phm_ppt_v1_pcie_record;
105 
106 struct phm_ppt_v1_pcie_table {
107 	uint32_t count;                                            /* Number of entries. */
108 	phm_ppt_v1_pcie_record entries[1];                         /* Dynamically allocate count entries. */
109 };
110 typedef struct phm_ppt_v1_pcie_table phm_ppt_v1_pcie_table;
111 
112 struct phm_ppt_v1_gpio_table {
113 	uint8_t vrhot_triggered_sclk_dpm_index;           /* SCLK DPM level index to switch to when VRHot is triggered */
114 };
115 typedef struct phm_ppt_v1_gpio_table phm_ppt_v1_gpio_table;
116 
117 #endif
118 
119