xref: /netbsd-src/sys/arch/alpha/pci/mcpciavar.h (revision 7663c1deeb1a1eb7d0b8d5910c6bd0391fee5692)
1 /* $NetBSD: mcpciavar.h,v 1.7 2023/12/04 00:32:10 thorpej Exp $ */
2 
3 /*
4  * Copyright (c) 1998 by Matthew Jacob
5  * NASA AMES Research Center.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice immediately at the beginning of the file, without modification,
13  *    this list of conditions, and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. The name of the author may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  */
32 
33 #include <sys/extent.h>
34 #include <sys/vmem_impl.h>
35 
36 #include <dev/pci/pcivar.h>
37 
38 #include <alpha/pci/pci_sgmap_pte64.h>
39 
40 #define	MCPCIA_IO_NBTS		VMEM_EST_BTCOUNT(2, 8)
41 #define	MCPCIA_D_MEM_NBTS	VMEM_EST_BTCOUNT(1, 8)
42 #define	MCPCIA_S_MEM_NBTS	VMEM_EST_BTCOUNT(2, 8)
43 
44 /*
45  * MPCIA configuration.
46  */
47 struct mcpcia_config {
48 	int				cc_gid;	/* GID of this MCbus */
49 	int				cc_mid;	/* MCbus Module ID */
50 	int				cc_initted;
51 	struct alpha_bus_space		cc_iot;
52 	struct alpha_bus_space		cc_memt;
53 	vmem_t *			cc_io_arena;
54 	vmem_t *			cc_d_mem_arena;
55 	vmem_t *			cc_s_mem_arena;
56 	struct alpha_pci_chipset	cc_pc;
57 	struct mcpcia_softc *		cc_sc;	/* back pointer */
58 	struct vmem			cc_io_arena_store;
59 	struct vmem			cc_d_mem_arena_store;
60 	struct vmem			cc_s_mem_arena_store;
61 	struct vmem_btag		cc_io_btag_store[MCPCIA_IO_NBTS];
62 	struct vmem_btag		cc_d_mem_btag_store[MCPCIA_D_MEM_NBTS];
63 	struct vmem_btag		cc_s_mem_btag_store[MCPCIA_S_MEM_NBTS];
64 	unsigned long			cc_sysbase;	/* shorthand */
65 	struct alpha_bus_dma_tag	cc_dmat_direct;
66 	struct alpha_bus_dma_tag	cc_dmat_pci_sgmap;
67 	struct alpha_bus_dma_tag	cc_dmat_isa_sgmap;
68 	struct alpha_sgmap		cc_pci_sgmap;
69 	struct alpha_sgmap		cc_isa_sgmap;
70 };
71 
72 struct mcpcia_softc {
73 	device_t		mcpcia_dev;
74 	struct mcpcia_config	*mcpcia_cc;	/* config info */
75 };
76 
77 void	mcpcia_init(void);
78 void	mcpcia_config_cleanup(void);
79 
80 void	mcpcia_pci_init(pci_chipset_tag_t, void *);
81 void	mcpcia_dma_init(struct mcpcia_config *);
82 
83 void	mcpcia_bus_io_init(bus_space_tag_t, void *);
84 void	mcpcia_bus_mem_init(bus_space_tag_t, void *);
85 
86 /*
87  * IO Interrupt handler.
88  */
89 void 	mcpcia_iointr(void *, unsigned long);
90 
91 /*
92  * There are four PCI slots per MCPCIA PCI bus here, but some are 'hidden'-
93  * none seems to be higher than 6 though.
94  */
95 #define	MCPCIA_MAXDEV	6
96 #define	MCPCIA_MAXSLOT	8
97 
98 /*
99  * Interrupt Stuff for MCPCIA systems.
100  *
101  * EISA interrupts (at vector 0x800) have to be shared interrupts-
102  * and that can be easily managed. All the PCI interrupts are deterministic
103  * in that they start at vector 0x900, 0x40 per PCI slot, 0x200 per
104  * MCPCIA, 4 MCPCIAs per GCBUS....
105  */
106 #define MCPCIA_EISA_KEYB_IRQ	1
107 #define MCPCIA_EISA_MOUSE_IRQ	12
108 #define MCPCIA_VEC_EISA		0x800
109 #define MCPCIA_VEC_PCI		0x900
110 
111 /*
112  * Special Vectors
113  */
114 #define	MCPCIA_I2C_CVEC		0xA90
115 #define	MCPCIA_I2C_BVEC		0xAA0
116