xref: /netbsd-src/sys/arch/sparc/sparc/cache_print.h (revision 8ea873287de6b23fa523a31e739ee379d6aa9bc5)
1 /*	$NetBSD: cache_print.h,v 1.1 2018/01/16 08:23:17 mrg Exp $	*/
2 
3 /*-
4  * Copyright (c) 1997 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Paul Kranenburg.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * This works for kernel and cpuctl(8).  It only relies upon having
34  * a working printf() in the environment.
35  */
36 
37 static void cache_printf_backend(struct cacheinfo *ci, const char *cpuname);
38 
39 static void
cache_printf_backend(struct cacheinfo * ci,const char * cpuname)40 cache_printf_backend(struct cacheinfo *ci, const char *cpuname)
41 {
42 
43 	if (ci->c_flags & CACHE_TRAPPAGEBUG)
44 		printf("%s: cache chip bug; trap page uncached\n", cpuname);
45 
46 	printf("%s: ", cpuname);
47 
48 	if (ci->c_totalsize == 0) {
49 		printf("no cache\n");
50 		return;
51 	}
52 
53 	if (ci->c_split) {
54 		const char *sep = "";
55 
56 		printf("%s", (ci->c_physical ? "physical " : ""));
57 		if (ci->ic_totalsize > 0) {
58 			printf("%s%dK instruction (%d b/l)", sep,
59 			    ci->ic_totalsize/1024, ci->ic_linesize);
60 			sep = ", ";
61 		}
62 		if (ci->dc_totalsize > 0) {
63 			printf("%s%dK data (%d b/l)", sep,
64 			    ci->dc_totalsize/1024, ci->dc_linesize);
65 		}
66 	} else if (ci->c_physical) {
67 		/* combined, physical */
68 		printf("physical %dK combined cache (%d bytes/line)",
69 		    ci->c_totalsize/1024, ci->c_linesize);
70 	} else {
71 		/* combined, virtual */
72 		printf("%dK byte write-%s, %d bytes/line, %cw flush",
73 		    ci->c_totalsize/1024,
74 		    (ci->c_vactype == VAC_WRITETHROUGH) ? "through" : "back",
75 		    ci->c_linesize,
76 		    ci->c_hwflush ? 'h' : 's');
77 	}
78 
79 	if (ci->ec_totalsize > 0) {
80 		printf(", %dK external (%d b/l)",
81 		    ci->ec_totalsize/1024, ci->ec_linesize);
82 	}
83 	printf(": ");
84 	if (ci->c_enabled)
85 		printf("cache enabled");
86 	printf("\n");
87 }
88