1 /* $NetBSD: nouveau_dispnv50_base507c.c,v 1.2 2021/12/18 23:45:32 riastradh Exp $ */
2
3 /*
4 * Copyright 2018 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24 #include <sys/cdefs.h>
25 __KERNEL_RCSID(0, "$NetBSD: nouveau_dispnv50_base507c.c,v 1.2 2021/12/18 23:45:32 riastradh Exp $");
26
27 #include "base.h"
28
29 #include <nvif/cl507c.h>
30 #include <nvif/event.h>
31
32 #include <drm/drm_atomic_helper.h>
33 #include <drm/drm_fourcc.h>
34 #include <drm/drm_plane_helper.h>
35
36 #include "nouveau_bo.h"
37
38 void
base507c_update(struct nv50_wndw * wndw,u32 * interlock)39 base507c_update(struct nv50_wndw *wndw, u32 *interlock)
40 {
41 u32 *push;
42 if ((push = evo_wait(&wndw->wndw, 2))) {
43 evo_mthd(push, 0x0080, 1);
44 evo_data(push, interlock[NV50_DISP_INTERLOCK_CORE]);
45 evo_kick(push, &wndw->wndw);
46 }
47 }
48
49 void
base507c_image_clr(struct nv50_wndw * wndw)50 base507c_image_clr(struct nv50_wndw *wndw)
51 {
52 u32 *push;
53 if ((push = evo_wait(&wndw->wndw, 4))) {
54 evo_mthd(push, 0x0084, 1);
55 evo_data(push, 0x00000000);
56 evo_mthd(push, 0x00c0, 1);
57 evo_data(push, 0x00000000);
58 evo_kick(push, &wndw->wndw);
59 }
60 }
61
62 static void
base507c_image_set(struct nv50_wndw * wndw,struct nv50_wndw_atom * asyw)63 base507c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
64 {
65 u32 *push;
66 if ((push = evo_wait(&wndw->wndw, 13))) {
67 evo_mthd(push, 0x0084, 1);
68 evo_data(push, asyw->image.mode << 8 |
69 asyw->image.interval << 4);
70 evo_mthd(push, 0x00c0, 1);
71 evo_data(push, asyw->image.handle[0]);
72 if (asyw->image.format == 0xca) {
73 evo_mthd(push, 0x0110, 2);
74 evo_data(push, 1);
75 evo_data(push, 0x6400);
76 } else {
77 evo_mthd(push, 0x0110, 2);
78 evo_data(push, 0);
79 evo_data(push, 0);
80 }
81 evo_mthd(push, 0x0800, 5);
82 evo_data(push, asyw->image.offset[0] >> 8);
83 evo_data(push, 0x00000000);
84 evo_data(push, asyw->image.h << 16 | asyw->image.w);
85 evo_data(push, asyw->image.layout << 20 |
86 (asyw->image.pitch[0] >> 8) << 8 |
87 asyw->image.blocks[0] << 8 |
88 asyw->image.blockh);
89 evo_data(push, asyw->image.kind << 16 |
90 asyw->image.format << 8);
91 evo_kick(push, &wndw->wndw);
92 }
93 }
94
95 void
base507c_xlut_clr(struct nv50_wndw * wndw)96 base507c_xlut_clr(struct nv50_wndw *wndw)
97 {
98 u32 *push;
99 if ((push = evo_wait(&wndw->wndw, 2))) {
100 evo_mthd(push, 0x00e0, 1);
101 evo_data(push, 0x00000000);
102 evo_kick(push, &wndw->wndw);
103 }
104 }
105
106 void
base507c_xlut_set(struct nv50_wndw * wndw,struct nv50_wndw_atom * asyw)107 base507c_xlut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
108 {
109 u32 *push;
110 if ((push = evo_wait(&wndw->wndw, 2))) {
111 evo_mthd(push, 0x00e0, 1);
112 evo_data(push, 0x40000000);
113 evo_kick(push, &wndw->wndw);
114 }
115 }
116
117 int
base507c_ntfy_wait_begun(struct nouveau_bo * bo,u32 offset,struct nvif_device * device)118 base507c_ntfy_wait_begun(struct nouveau_bo *bo, u32 offset,
119 struct nvif_device *device)
120 {
121 s64 time = nvif_msec(device, 2000ULL,
122 u32 data = nouveau_bo_rd32(bo, offset / 4);
123 if ((data & 0xc0000000) == 0x40000000)
124 break;
125 usleep_range(1, 2);
126 );
127 return time < 0 ? time : 0;
128 }
129
130 void
base507c_ntfy_clr(struct nv50_wndw * wndw)131 base507c_ntfy_clr(struct nv50_wndw *wndw)
132 {
133 u32 *push;
134 if ((push = evo_wait(&wndw->wndw, 2))) {
135 evo_mthd(push, 0x00a4, 1);
136 evo_data(push, 0x00000000);
137 evo_kick(push, &wndw->wndw);
138 }
139 }
140
141 void
base507c_ntfy_set(struct nv50_wndw * wndw,struct nv50_wndw_atom * asyw)142 base507c_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
143 {
144 u32 *push;
145 if ((push = evo_wait(&wndw->wndw, 3))) {
146 evo_mthd(push, 0x00a0, 2);
147 evo_data(push, asyw->ntfy.awaken << 30 | asyw->ntfy.offset);
148 evo_data(push, asyw->ntfy.handle);
149 evo_kick(push, &wndw->wndw);
150 }
151 }
152
153 void
base507c_ntfy_reset(struct nouveau_bo * bo,u32 offset)154 base507c_ntfy_reset(struct nouveau_bo *bo, u32 offset)
155 {
156 nouveau_bo_wr32(bo, offset / 4, 0x00000000);
157 }
158
159 void
base507c_sema_clr(struct nv50_wndw * wndw)160 base507c_sema_clr(struct nv50_wndw *wndw)
161 {
162 u32 *push;
163 if ((push = evo_wait(&wndw->wndw, 2))) {
164 evo_mthd(push, 0x0094, 1);
165 evo_data(push, 0x00000000);
166 evo_kick(push, &wndw->wndw);
167 }
168 }
169
170 void
base507c_sema_set(struct nv50_wndw * wndw,struct nv50_wndw_atom * asyw)171 base507c_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
172 {
173 u32 *push;
174 if ((push = evo_wait(&wndw->wndw, 5))) {
175 evo_mthd(push, 0x0088, 4);
176 evo_data(push, asyw->sema.offset);
177 evo_data(push, asyw->sema.acquire);
178 evo_data(push, asyw->sema.release);
179 evo_data(push, asyw->sema.handle);
180 evo_kick(push, &wndw->wndw);
181 }
182 }
183
184 void
base507c_release(struct nv50_wndw * wndw,struct nv50_wndw_atom * asyw,struct nv50_head_atom * asyh)185 base507c_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
186 struct nv50_head_atom *asyh)
187 {
188 asyh->base.cpp = 0;
189 }
190
191 int
base507c_acquire(struct nv50_wndw * wndw,struct nv50_wndw_atom * asyw,struct nv50_head_atom * asyh)192 base507c_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
193 struct nv50_head_atom *asyh)
194 {
195 const struct drm_framebuffer *fb = asyw->state.fb;
196 int ret;
197
198 ret = drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,
199 DRM_PLANE_HELPER_NO_SCALING,
200 DRM_PLANE_HELPER_NO_SCALING,
201 false, true);
202 if (ret)
203 return ret;
204
205 if (!wndw->func->ilut) {
206 if ((asyh->base.cpp != 1) ^ (fb->format->cpp[0] != 1))
207 asyh->state.color_mgmt_changed = true;
208 }
209
210 asyh->base.depth = fb->format->depth;
211 asyh->base.cpp = fb->format->cpp[0];
212 asyh->base.x = asyw->state.src.x1 >> 16;
213 asyh->base.y = asyw->state.src.y1 >> 16;
214 asyh->base.w = asyw->state.fb->width;
215 asyh->base.h = asyw->state.fb->height;
216
217 /* Some newer formats, esp FP16 ones, don't have a
218 * "depth". There's nothing that really makes sense there
219 * either, so just set it to the implicit bit count.
220 */
221 if (!asyh->base.depth)
222 asyh->base.depth = asyh->base.cpp * 8;
223
224 return 0;
225 }
226
227 const u32
228 base507c_format[] = {
229 DRM_FORMAT_C8,
230 DRM_FORMAT_RGB565,
231 DRM_FORMAT_XRGB1555,
232 DRM_FORMAT_ARGB1555,
233 DRM_FORMAT_XRGB8888,
234 DRM_FORMAT_ARGB8888,
235 DRM_FORMAT_XBGR2101010,
236 DRM_FORMAT_ABGR2101010,
237 DRM_FORMAT_XBGR8888,
238 DRM_FORMAT_ABGR8888,
239 DRM_FORMAT_XBGR16161616F,
240 DRM_FORMAT_ABGR16161616F,
241 0
242 };
243
244 static const struct nv50_wndw_func
245 base507c = {
246 .acquire = base507c_acquire,
247 .release = base507c_release,
248 .sema_set = base507c_sema_set,
249 .sema_clr = base507c_sema_clr,
250 .ntfy_reset = base507c_ntfy_reset,
251 .ntfy_set = base507c_ntfy_set,
252 .ntfy_clr = base507c_ntfy_clr,
253 .ntfy_wait_begun = base507c_ntfy_wait_begun,
254 .olut_core = 1,
255 .xlut_set = base507c_xlut_set,
256 .xlut_clr = base507c_xlut_clr,
257 .image_set = base507c_image_set,
258 .image_clr = base507c_image_clr,
259 .update = base507c_update,
260 };
261
262 int
base507c_new_(const struct nv50_wndw_func * func,const u32 * format,struct nouveau_drm * drm,int head,s32 oclass,u32 interlock_data,struct nv50_wndw ** pwndw)263 base507c_new_(const struct nv50_wndw_func *func, const u32 *format,
264 struct nouveau_drm *drm, int head, s32 oclass, u32 interlock_data,
265 struct nv50_wndw **pwndw)
266 {
267 struct nv50_disp_base_channel_dma_v0 args = {
268 .head = head,
269 };
270 struct nv50_disp *disp = nv50_disp(drm->dev);
271 struct nv50_wndw *wndw;
272 int ret;
273
274 ret = nv50_wndw_new_(func, drm->dev, DRM_PLANE_TYPE_PRIMARY,
275 "base", head, format, BIT(head),
276 NV50_DISP_INTERLOCK_BASE, interlock_data, &wndw);
277 if (*pwndw = wndw, ret)
278 return ret;
279
280 ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
281 &oclass, head, &args, sizeof(args),
282 disp->sync->bo.offset, &wndw->wndw);
283 if (ret) {
284 NV_ERROR(drm, "base%04x allocation failed: %d\n", oclass, ret);
285 return ret;
286 }
287
288 ret = nvif_notify_init(&wndw->wndw.base.user, wndw->notify.func,
289 false, NV50_DISP_BASE_CHANNEL_DMA_V0_NTFY_UEVENT,
290 &(struct nvif_notify_uevent_req) {},
291 sizeof(struct nvif_notify_uevent_req),
292 sizeof(struct nvif_notify_uevent_rep),
293 &wndw->notify);
294 if (ret)
295 return ret;
296
297 wndw->ntfy = NV50_DISP_BASE_NTFY(wndw->id);
298 wndw->sema = NV50_DISP_BASE_SEM0(wndw->id);
299 wndw->data = 0x00000000;
300 return 0;
301 }
302
303 int
base507c_new(struct nouveau_drm * drm,int head,s32 oclass,struct nv50_wndw ** pwndw)304 base507c_new(struct nouveau_drm *drm, int head, s32 oclass,
305 struct nv50_wndw **pwndw)
306 {
307 return base507c_new_(&base507c, base507c_format, drm, head, oclass,
308 0x00000002 << (head * 8), pwndw);
309 }
310