1 /* $NetBSD: disasm_extract.c,v 1.3 2016/08/05 16:45:50 scole Exp $ */
2
3 /*-
4 * Copyright (c) 2000-2006 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 /* __FBSDID("$FreeBSD: releng/10.1/sys/ia64/disasm/disasm_extract.c 159916 2006-06-24 19:21:11Z marcel $"); */
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34
35 #include <ia64/disasm/disasm_int.h>
36 #include <ia64/disasm/disasm.h>
37
38 #define FRAG(o,l) ((int)((o << 8) | (l & 0xff)))
39 #define FRAG_OFS(f) (f >> 8)
40 #define FRAG_LEN(f) (f & 0xff)
41
42 /*
43 * Support functions.
44 */
45 static void
asm_cmpltr_add(struct asm_inst * i,enum asm_cmpltr_class c,enum asm_cmpltr_type t)46 asm_cmpltr_add(struct asm_inst *i, enum asm_cmpltr_class c,
47 enum asm_cmpltr_type t)
48 {
49
50 i->i_cmpltr[i->i_ncmpltrs].c_class = c;
51 i->i_cmpltr[i->i_ncmpltrs].c_type = t;
52 i->i_ncmpltrs++;
53 KASSERT(i->i_ncmpltrs < 6);
54 }
55
56 static void
asm_hint(struct asm_inst * i,enum asm_cmpltr_class c)57 asm_hint(struct asm_inst *i, enum asm_cmpltr_class c)
58 {
59
60 switch (FIELD(i->i_bits, 28, 2)) { /* hint */
61 case 0:
62 asm_cmpltr_add(i, c, ASM_CT_NONE);
63 break;
64 case 1:
65 asm_cmpltr_add(i, c, ASM_CT_NT1);
66 break;
67 case 2:
68 asm_cmpltr_add(i, c, ASM_CT_NT2);
69 break;
70 case 3:
71 asm_cmpltr_add(i, c, ASM_CT_NTA);
72 break;
73 }
74 }
75
76 static void
asm_sf(struct asm_inst * i)77 asm_sf(struct asm_inst *i)
78 {
79
80 switch (FIELD(i->i_bits, 34, 2)) {
81 case 0:
82 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S0);
83 break;
84 case 1:
85 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S1);
86 break;
87 case 2:
88 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S2);
89 break;
90 case 3:
91 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S3);
92 break;
93 }
94 }
95
96 static void
asm_brhint(struct asm_inst * i)97 asm_brhint(struct asm_inst *i)
98 {
99 uint64_t bits = i->i_bits;
100
101 switch (FIELD(bits, 33, 2)) { /* bwh */
102 case 0:
103 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_SPTK);
104 break;
105 case 1:
106 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_SPNT);
107 break;
108 case 2:
109 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_DPTK);
110 break;
111 case 3:
112 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_DPNT);
113 break;
114 }
115
116 if (FIELD(bits, 12, 1)) /* ph */
117 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_MANY);
118 else
119 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_FEW);
120
121 if (FIELD(bits, 35, 1)) /* dh */
122 asm_cmpltr_add(i, ASM_CC_DH, ASM_CT_CLR);
123 else
124 asm_cmpltr_add(i, ASM_CC_DH, ASM_CT_NONE);
125 }
126
127 static void
asm_brphint(struct asm_inst * i)128 asm_brphint(struct asm_inst *i)
129 {
130 uint64_t bits = i->i_bits;
131
132 switch (FIELD(bits, 3, 2)) { /* ipwh, indwh */
133 case 0:
134 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_SPTK);
135 break;
136 case 1:
137 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_LOOP);
138 break;
139 case 2:
140 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_DPTK);
141 break;
142 case 3:
143 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_EXIT);
144 break;
145 }
146
147 if (FIELD(bits, 5, 1)) /* ph */
148 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_MANY);
149 else
150 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_FEW);
151
152 switch (FIELD(bits, 0, 3)) { /* pvec */
153 case 0:
154 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_DC_DC);
155 break;
156 case 1:
157 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_DC_NT);
158 break;
159 case 2:
160 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_DC);
161 break;
162 case 3:
163 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_TK);
164 break;
165 case 4:
166 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_NT);
167 break;
168 case 5:
169 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_DC);
170 break;
171 case 6:
172 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_TK);
173 break;
174 case 7:
175 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_NT);
176 break;
177 }
178
179 if (FIELD(bits, 35, 1)) /* ih */
180 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_IMP);
181 else
182 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_NONE);
183 }
184
185 static enum asm_oper_type
asm_normalize(struct asm_inst * i,enum asm_op op)186 asm_normalize(struct asm_inst *i, enum asm_op op)
187 {
188 enum asm_oper_type ot = ASM_OPER_NONE;
189
190 switch (op) {
191 case ASM_OP_BR_CALL:
192 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CALL);
193 op = ASM_OP_BR;
194 break;
195 case ASM_OP_BR_CEXIT:
196 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CEXIT);
197 op = ASM_OP_BR;
198 break;
199 case ASM_OP_BR_CLOOP:
200 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CLOOP);
201 op = ASM_OP_BR;
202 break;
203 case ASM_OP_BR_COND:
204 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_COND);
205 op = ASM_OP_BR;
206 break;
207 case ASM_OP_BR_CTOP:
208 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CTOP);
209 op = ASM_OP_BR;
210 break;
211 case ASM_OP_BR_IA:
212 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_IA);
213 op = ASM_OP_BR;
214 break;
215 case ASM_OP_BR_RET:
216 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_RET);
217 op = ASM_OP_BR;
218 break;
219 case ASM_OP_BR_WEXIT:
220 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_WEXIT);
221 op = ASM_OP_BR;
222 break;
223 case ASM_OP_BR_WTOP:
224 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_WTOP);
225 op = ASM_OP_BR;
226 break;
227 case ASM_OP_BREAK_B:
228 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B);
229 op = ASM_OP_BREAK;
230 break;
231 case ASM_OP_BREAK_F:
232 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F);
233 op = ASM_OP_BREAK;
234 break;
235 case ASM_OP_BREAK_I:
236 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
237 op = ASM_OP_BREAK;
238 break;
239 case ASM_OP_BREAK_M:
240 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
241 op = ASM_OP_BREAK;
242 break;
243 case ASM_OP_BREAK_X:
244 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X);
245 op = ASM_OP_BREAK;
246 break;
247 case ASM_OP_BRL_COND:
248 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_COND);
249 op = ASM_OP_BRL;
250 break;
251 case ASM_OP_BRL_CALL:
252 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CALL);
253 op = ASM_OP_BRL;
254 break;
255 case ASM_OP_BRP_:
256 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_NONE);
257 op = ASM_OP_BRP;
258 break;
259 case ASM_OP_BRP_RET:
260 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_RET);
261 op = ASM_OP_BRP;
262 break;
263 case ASM_OP_BSW_0:
264 asm_cmpltr_add(i, ASM_CC_BSW, ASM_CT_0);
265 op = ASM_OP_BSW;
266 break;
267 case ASM_OP_BSW_1:
268 asm_cmpltr_add(i, ASM_CC_BSW, ASM_CT_1);
269 op = ASM_OP_BSW;
270 break;
271 case ASM_OP_CHK_A_CLR:
272 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_A);
273 asm_cmpltr_add(i, ASM_CC_ACLR, ASM_CT_CLR);
274 op = ASM_OP_CHK;
275 break;
276 case ASM_OP_CHK_A_NC:
277 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_A);
278 asm_cmpltr_add(i, ASM_CC_ACLR, ASM_CT_NC);
279 op = ASM_OP_CHK;
280 break;
281 case ASM_OP_CHK_S:
282 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
283 op = ASM_OP_CHK;
284 break;
285 case ASM_OP_CHK_S_I:
286 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
287 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
288 op = ASM_OP_CHK;
289 break;
290 case ASM_OP_CHK_S_M:
291 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
292 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
293 op = ASM_OP_CHK;
294 break;
295 case ASM_OP_CLRRRB_:
296 asm_cmpltr_add(i, ASM_CC_CLRRRB, ASM_CT_NONE);
297 op = ASM_OP_CLRRRB;
298 break;
299 case ASM_OP_CLRRRB_PR:
300 asm_cmpltr_add(i, ASM_CC_CLRRRB, ASM_CT_PR);
301 op = ASM_OP_CLRRRB;
302 break;
303 case ASM_OP_CMP_EQ:
304 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
305 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
306 op = ASM_OP_CMP;
307 break;
308 case ASM_OP_CMP_EQ_AND:
309 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
310 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
311 op = ASM_OP_CMP;
312 break;
313 case ASM_OP_CMP_EQ_OR:
314 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
315 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
316 op = ASM_OP_CMP;
317 break;
318 case ASM_OP_CMP_EQ_OR_ANDCM:
319 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
320 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
321 op = ASM_OP_CMP;
322 break;
323 case ASM_OP_CMP_EQ_UNC:
324 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
325 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
326 op = ASM_OP_CMP;
327 break;
328 case ASM_OP_CMP_GE_AND:
329 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
330 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
331 op = ASM_OP_CMP;
332 break;
333 case ASM_OP_CMP_GE_OR:
334 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
335 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
336 op = ASM_OP_CMP;
337 break;
338 case ASM_OP_CMP_GE_OR_ANDCM:
339 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
340 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
341 op = ASM_OP_CMP;
342 break;
343 case ASM_OP_CMP_GT_AND:
344 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
345 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
346 op = ASM_OP_CMP;
347 break;
348 case ASM_OP_CMP_GT_OR:
349 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
350 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
351 op = ASM_OP_CMP;
352 break;
353 case ASM_OP_CMP_GT_OR_ANDCM:
354 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
355 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
356 op = ASM_OP_CMP;
357 break;
358 case ASM_OP_CMP_LE_AND:
359 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
360 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
361 op = ASM_OP_CMP;
362 break;
363 case ASM_OP_CMP_LE_OR:
364 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
365 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
366 op = ASM_OP_CMP;
367 break;
368 case ASM_OP_CMP_LE_OR_ANDCM:
369 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
370 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
371 op = ASM_OP_CMP;
372 break;
373 case ASM_OP_CMP_LT:
374 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
375 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
376 op = ASM_OP_CMP;
377 break;
378 case ASM_OP_CMP_LT_AND:
379 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
380 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
381 op = ASM_OP_CMP;
382 break;
383 case ASM_OP_CMP_LT_OR:
384 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
385 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
386 op = ASM_OP_CMP;
387 break;
388 case ASM_OP_CMP_LT_OR_ANDCM:
389 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
390 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
391 op = ASM_OP_CMP;
392 break;
393 case ASM_OP_CMP_LT_UNC:
394 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
395 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
396 op = ASM_OP_CMP;
397 break;
398 case ASM_OP_CMP_LTU:
399 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
400 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
401 op = ASM_OP_CMP;
402 break;
403 case ASM_OP_CMP_LTU_UNC:
404 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
405 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
406 op = ASM_OP_CMP;
407 break;
408 case ASM_OP_CMP_NE_AND:
409 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
410 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
411 op = ASM_OP_CMP;
412 break;
413 case ASM_OP_CMP_NE_OR:
414 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
415 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
416 op = ASM_OP_CMP;
417 break;
418 case ASM_OP_CMP_NE_OR_ANDCM:
419 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
420 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
421 op = ASM_OP_CMP;
422 break;
423 case ASM_OP_CMP4_EQ:
424 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
425 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
426 op = ASM_OP_CMP4;
427 break;
428 case ASM_OP_CMP4_EQ_AND:
429 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
430 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
431 op = ASM_OP_CMP4;
432 break;
433 case ASM_OP_CMP4_EQ_OR:
434 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
435 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
436 op = ASM_OP_CMP4;
437 break;
438 case ASM_OP_CMP4_EQ_OR_ANDCM:
439 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
440 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
441 op = ASM_OP_CMP4;
442 break;
443 case ASM_OP_CMP4_EQ_UNC:
444 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
445 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
446 op = ASM_OP_CMP4;
447 break;
448 case ASM_OP_CMP4_GE_AND:
449 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
450 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
451 op = ASM_OP_CMP4;
452 break;
453 case ASM_OP_CMP4_GE_OR:
454 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
455 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
456 op = ASM_OP_CMP4;
457 break;
458 case ASM_OP_CMP4_GE_OR_ANDCM:
459 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
460 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
461 op = ASM_OP_CMP4;
462 break;
463 case ASM_OP_CMP4_GT_AND:
464 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
465 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
466 op = ASM_OP_CMP4;
467 break;
468 case ASM_OP_CMP4_GT_OR:
469 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
470 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
471 op = ASM_OP_CMP4;
472 break;
473 case ASM_OP_CMP4_GT_OR_ANDCM:
474 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
475 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
476 op = ASM_OP_CMP4;
477 break;
478 case ASM_OP_CMP4_LE_AND:
479 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
480 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
481 op = ASM_OP_CMP4;
482 break;
483 case ASM_OP_CMP4_LE_OR:
484 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
485 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
486 op = ASM_OP_CMP4;
487 break;
488 case ASM_OP_CMP4_LE_OR_ANDCM:
489 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
490 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
491 op = ASM_OP_CMP4;
492 break;
493 case ASM_OP_CMP4_LT:
494 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
495 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
496 op = ASM_OP_CMP4;
497 break;
498 case ASM_OP_CMP4_LT_AND:
499 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
500 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
501 op = ASM_OP_CMP4;
502 break;
503 case ASM_OP_CMP4_LT_OR:
504 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
505 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
506 op = ASM_OP_CMP4;
507 break;
508 case ASM_OP_CMP4_LT_OR_ANDCM:
509 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
510 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
511 op = ASM_OP_CMP4;
512 break;
513 case ASM_OP_CMP4_LT_UNC:
514 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
515 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
516 op = ASM_OP_CMP4;
517 break;
518 case ASM_OP_CMP4_LTU:
519 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
520 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
521 op = ASM_OP_CMP4;
522 break;
523 case ASM_OP_CMP4_LTU_UNC:
524 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
525 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
526 op = ASM_OP_CMP4;
527 break;
528 case ASM_OP_CMP4_NE_AND:
529 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
530 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
531 op = ASM_OP_CMP4;
532 break;
533 case ASM_OP_CMP4_NE_OR:
534 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
535 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
536 op = ASM_OP_CMP4;
537 break;
538 case ASM_OP_CMP4_NE_OR_ANDCM:
539 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
540 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
541 op = ASM_OP_CMP4;
542 break;
543 case ASM_OP_CMP8XCHG16_ACQ:
544 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
545 op = ASM_OP_CMP8XCHG16;
546 break;
547 case ASM_OP_CMP8XCHG16_REL:
548 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
549 op = ASM_OP_CMP8XCHG16;
550 break;
551 case ASM_OP_CMPXCHG1_ACQ:
552 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
553 op = ASM_OP_CMPXCHG1;
554 break;
555 case ASM_OP_CMPXCHG1_REL:
556 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
557 op = ASM_OP_CMPXCHG1;
558 break;
559 case ASM_OP_CMPXCHG2_ACQ:
560 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
561 op = ASM_OP_CMPXCHG2;
562 break;
563 case ASM_OP_CMPXCHG2_REL:
564 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
565 op = ASM_OP_CMPXCHG2;
566 break;
567 case ASM_OP_CMPXCHG4_ACQ:
568 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
569 op = ASM_OP_CMPXCHG4;
570 break;
571 case ASM_OP_CMPXCHG4_REL:
572 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
573 op = ASM_OP_CMPXCHG4;
574 break;
575 case ASM_OP_CMPXCHG8_ACQ:
576 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
577 op = ASM_OP_CMPXCHG8;
578 break;
579 case ASM_OP_CMPXCHG8_REL:
580 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
581 op = ASM_OP_CMPXCHG8;
582 break;
583 case ASM_OP_CZX1_L:
584 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
585 op = ASM_OP_CZX1;
586 break;
587 case ASM_OP_CZX1_R:
588 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
589 op = ASM_OP_CZX1;
590 break;
591 case ASM_OP_CZX2_L:
592 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
593 op = ASM_OP_CZX2;
594 break;
595 case ASM_OP_CZX2_R:
596 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
597 op = ASM_OP_CZX2;
598 break;
599 case ASM_OP_DEP_:
600 asm_cmpltr_add(i, ASM_CC_DEP, ASM_CT_NONE);
601 op = ASM_OP_DEP;
602 break;
603 case ASM_OP_DEP_Z:
604 asm_cmpltr_add(i, ASM_CC_DEP, ASM_CT_Z);
605 op = ASM_OP_DEP;
606 break;
607 case ASM_OP_FC_:
608 asm_cmpltr_add(i, ASM_CC_FC, ASM_CT_NONE);
609 op = ASM_OP_FC;
610 break;
611 case ASM_OP_FC_I:
612 asm_cmpltr_add(i, ASM_CC_FC, ASM_CT_I);
613 op = ASM_OP_FC;
614 break;
615 case ASM_OP_FCLASS_M:
616 asm_cmpltr_add(i, ASM_CC_FCREL, ASM_CT_M);
617 op = ASM_OP_FCLASS;
618 break;
619 case ASM_OP_FCVT_FX:
620 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
621 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
622 op = ASM_OP_FCVT;
623 break;
624 case ASM_OP_FCVT_FX_TRUNC:
625 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
626 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
627 op = ASM_OP_FCVT;
628 break;
629 case ASM_OP_FCVT_FXU:
630 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
631 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
632 op = ASM_OP_FCVT;
633 break;
634 case ASM_OP_FCVT_FXU_TRUNC:
635 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
636 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
637 op = ASM_OP_FCVT;
638 break;
639 case ASM_OP_FCVT_XF:
640 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_XF);
641 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
642 op = ASM_OP_FCVT;
643 break;
644 case ASM_OP_FETCHADD4_ACQ:
645 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
646 op = ASM_OP_FETCHADD4;
647 break;
648 case ASM_OP_FETCHADD4_REL:
649 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
650 op = ASM_OP_FETCHADD4;
651 break;
652 case ASM_OP_FETCHADD8_ACQ:
653 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
654 op = ASM_OP_FETCHADD8;
655 break;
656 case ASM_OP_FETCHADD8_REL:
657 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
658 op = ASM_OP_FETCHADD8;
659 break;
660 case ASM_OP_FMA_:
661 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
662 op = ASM_OP_FMA;
663 break;
664 case ASM_OP_FMA_D:
665 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
666 op = ASM_OP_FMA;
667 break;
668 case ASM_OP_FMA_S:
669 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
670 op = ASM_OP_FMA;
671 break;
672 case ASM_OP_FMERGE_NS:
673 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_NS);
674 op = ASM_OP_FMERGE;
675 break;
676 case ASM_OP_FMERGE_S:
677 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_S);
678 op = ASM_OP_FMERGE;
679 break;
680 case ASM_OP_FMERGE_SE:
681 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_SE);
682 op = ASM_OP_FMERGE;
683 break;
684 case ASM_OP_FMIX_L:
685 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
686 op = ASM_OP_FMIX;
687 break;
688 case ASM_OP_FMIX_LR:
689 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_LR);
690 op = ASM_OP_FMIX;
691 break;
692 case ASM_OP_FMIX_R:
693 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
694 op = ASM_OP_FMIX;
695 break;
696 case ASM_OP_FMS_:
697 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
698 op = ASM_OP_FMS;
699 break;
700 case ASM_OP_FMS_D:
701 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
702 op = ASM_OP_FMS;
703 break;
704 case ASM_OP_FMS_S:
705 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
706 op = ASM_OP_FMS;
707 break;
708 case ASM_OP_FNMA_:
709 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
710 op = ASM_OP_FNMA;
711 break;
712 case ASM_OP_FNMA_D:
713 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
714 op = ASM_OP_FNMA;
715 break;
716 case ASM_OP_FNMA_S:
717 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
718 op = ASM_OP_FNMA;
719 break;
720 case ASM_OP_FPCMP_EQ:
721 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_EQ);
722 op = ASM_OP_FPCMP;
723 break;
724 case ASM_OP_FPCMP_LE:
725 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LE);
726 op = ASM_OP_FPCMP;
727 break;
728 case ASM_OP_FPCMP_LT:
729 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LT);
730 op = ASM_OP_FPCMP;
731 break;
732 case ASM_OP_FPCMP_NEQ:
733 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NEQ);
734 op = ASM_OP_FPCMP;
735 break;
736 case ASM_OP_FPCMP_NLE:
737 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NLE);
738 op = ASM_OP_FPCMP;
739 break;
740 case ASM_OP_FPCMP_NLT:
741 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NLT);
742 op = ASM_OP_FPCMP;
743 break;
744 case ASM_OP_FPCMP_ORD:
745 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_ORD);
746 op = ASM_OP_FPCMP;
747 break;
748 case ASM_OP_FPCMP_UNORD:
749 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_UNORD);
750 op = ASM_OP_FPCMP;
751 break;
752 case ASM_OP_FPCVT_FX:
753 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
754 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
755 op = ASM_OP_FPCVT;
756 break;
757 case ASM_OP_FPCVT_FX_TRUNC:
758 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
759 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
760 op = ASM_OP_FPCVT;
761 break;
762 case ASM_OP_FPCVT_FXU:
763 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
764 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
765 op = ASM_OP_FPCVT;
766 break;
767 case ASM_OP_FPCVT_FXU_TRUNC:
768 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
769 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
770 op = ASM_OP_FPCVT;
771 break;
772 case ASM_OP_FPMERGE_NS:
773 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_NS);
774 op = ASM_OP_FPMERGE;
775 break;
776 case ASM_OP_FPMERGE_S:
777 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_S);
778 op = ASM_OP_FPMERGE;
779 break;
780 case ASM_OP_FPMERGE_SE:
781 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_SE);
782 op = ASM_OP_FPMERGE;
783 break;
784 case ASM_OP_FSWAP_:
785 asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NONE);
786 op = ASM_OP_FSWAP;
787 break;
788 case ASM_OP_FSWAP_NL:
789 asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NL);
790 op = ASM_OP_FSWAP;
791 break;
792 case ASM_OP_FSWAP_NR:
793 asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NR);
794 op = ASM_OP_FSWAP;
795 break;
796 case ASM_OP_FSXT_L:
797 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
798 op = ASM_OP_FSXT;
799 break;
800 case ASM_OP_FSXT_R:
801 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
802 op = ASM_OP_FSXT;
803 break;
804 case ASM_OP_GETF_D:
805 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_D);
806 op = ASM_OP_GETF;
807 break;
808 case ASM_OP_GETF_EXP:
809 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_EXP);
810 op = ASM_OP_GETF;
811 break;
812 case ASM_OP_GETF_S:
813 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_S);
814 op = ASM_OP_GETF;
815 break;
816 case ASM_OP_GETF_SIG:
817 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_SIG);
818 op = ASM_OP_GETF;
819 break;
820 case ASM_OP_HINT_B:
821 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B);
822 op = ASM_OP_HINT;
823 break;
824 case ASM_OP_HINT_F:
825 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F);
826 op = ASM_OP_HINT;
827 break;
828 case ASM_OP_HINT_I:
829 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
830 op = ASM_OP_HINT;
831 break;
832 case ASM_OP_HINT_M:
833 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
834 op = ASM_OP_HINT;
835 break;
836 case ASM_OP_HINT_X:
837 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X);
838 op = ASM_OP_HINT;
839 break;
840 case ASM_OP_INVALA_:
841 asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_NONE);
842 op = ASM_OP_INVALA;
843 break;
844 case ASM_OP_INVALA_E:
845 asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_E);
846 op = ASM_OP_INVALA;
847 break;
848 case ASM_OP_ITC_D:
849 asm_cmpltr_add(i, ASM_CC_ITC, ASM_CT_D);
850 op = ASM_OP_ITC;
851 break;
852 case ASM_OP_ITC_I:
853 asm_cmpltr_add(i, ASM_CC_ITC, ASM_CT_I);
854 op = ASM_OP_ITC;
855 break;
856 case ASM_OP_ITR_D:
857 asm_cmpltr_add(i, ASM_CC_ITR, ASM_CT_D);
858 ot = ASM_OPER_DTR;
859 op = ASM_OP_ITR;
860 break;
861 case ASM_OP_ITR_I:
862 asm_cmpltr_add(i, ASM_CC_ITR, ASM_CT_I);
863 ot = ASM_OPER_ITR;
864 op = ASM_OP_ITR;
865 break;
866 case ASM_OP_LD1_:
867 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
868 op = ASM_OP_LD1;
869 break;
870 case ASM_OP_LD1_A:
871 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
872 op = ASM_OP_LD1;
873 break;
874 case ASM_OP_LD1_ACQ:
875 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
876 op = ASM_OP_LD1;
877 break;
878 case ASM_OP_LD1_BIAS:
879 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
880 op = ASM_OP_LD1;
881 break;
882 case ASM_OP_LD1_C_CLR:
883 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
884 op = ASM_OP_LD1;
885 break;
886 case ASM_OP_LD1_C_CLR_ACQ:
887 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
888 op = ASM_OP_LD1;
889 break;
890 case ASM_OP_LD1_C_NC:
891 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
892 op = ASM_OP_LD1;
893 break;
894 case ASM_OP_LD1_S:
895 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
896 op = ASM_OP_LD1;
897 break;
898 case ASM_OP_LD1_SA:
899 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
900 op = ASM_OP_LD1;
901 break;
902 case ASM_OP_LD16_:
903 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
904 op = ASM_OP_LD16;
905 break;
906 case ASM_OP_LD16_ACQ:
907 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
908 op = ASM_OP_LD16;
909 break;
910 case ASM_OP_LD2_:
911 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
912 op = ASM_OP_LD2;
913 break;
914 case ASM_OP_LD2_A:
915 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
916 op = ASM_OP_LD2;
917 break;
918 case ASM_OP_LD2_ACQ:
919 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
920 op = ASM_OP_LD2;
921 break;
922 case ASM_OP_LD2_BIAS:
923 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
924 op = ASM_OP_LD2;
925 break;
926 case ASM_OP_LD2_C_CLR:
927 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
928 op = ASM_OP_LD2;
929 break;
930 case ASM_OP_LD2_C_CLR_ACQ:
931 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
932 op = ASM_OP_LD2;
933 break;
934 case ASM_OP_LD2_C_NC:
935 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
936 op = ASM_OP_LD2;
937 break;
938 case ASM_OP_LD2_S:
939 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
940 op = ASM_OP_LD2;
941 break;
942 case ASM_OP_LD2_SA:
943 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
944 op = ASM_OP_LD2;
945 break;
946 case ASM_OP_LD4_:
947 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
948 op = ASM_OP_LD4;
949 break;
950 case ASM_OP_LD4_A:
951 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
952 op = ASM_OP_LD4;
953 break;
954 case ASM_OP_LD4_ACQ:
955 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
956 op = ASM_OP_LD4;
957 break;
958 case ASM_OP_LD4_BIAS:
959 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
960 op = ASM_OP_LD4;
961 break;
962 case ASM_OP_LD4_C_CLR:
963 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
964 op = ASM_OP_LD4;
965 break;
966 case ASM_OP_LD4_C_CLR_ACQ:
967 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
968 op = ASM_OP_LD4;
969 break;
970 case ASM_OP_LD4_C_NC:
971 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
972 op = ASM_OP_LD4;
973 break;
974 case ASM_OP_LD4_S:
975 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
976 op = ASM_OP_LD4;
977 break;
978 case ASM_OP_LD4_SA:
979 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
980 op = ASM_OP_LD4;
981 break;
982 case ASM_OP_LD8_:
983 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
984 op = ASM_OP_LD8;
985 break;
986 case ASM_OP_LD8_A:
987 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
988 op = ASM_OP_LD8;
989 break;
990 case ASM_OP_LD8_ACQ:
991 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
992 op = ASM_OP_LD8;
993 break;
994 case ASM_OP_LD8_BIAS:
995 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
996 op = ASM_OP_LD8;
997 break;
998 case ASM_OP_LD8_C_CLR:
999 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
1000 op = ASM_OP_LD8;
1001 break;
1002 case ASM_OP_LD8_C_CLR_ACQ:
1003 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
1004 op = ASM_OP_LD8;
1005 break;
1006 case ASM_OP_LD8_C_NC:
1007 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
1008 op = ASM_OP_LD8;
1009 break;
1010 case ASM_OP_LD8_FILL:
1011 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_FILL);
1012 op = ASM_OP_LD8;
1013 break;
1014 case ASM_OP_LD8_S:
1015 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
1016 op = ASM_OP_LD8;
1017 break;
1018 case ASM_OP_LD8_SA:
1019 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
1020 op = ASM_OP_LD8;
1021 break;
1022 case ASM_OP_LDF_FILL:
1023 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_FILL);
1024 op = ASM_OP_LDF;
1025 break;
1026 case ASM_OP_LDF8_:
1027 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1028 op = ASM_OP_LDF8;
1029 break;
1030 case ASM_OP_LDF8_A:
1031 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1032 op = ASM_OP_LDF8;
1033 break;
1034 case ASM_OP_LDF8_C_CLR:
1035 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1036 op = ASM_OP_LDF8;
1037 break;
1038 case ASM_OP_LDF8_C_NC:
1039 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1040 op = ASM_OP_LDF8;
1041 break;
1042 case ASM_OP_LDF8_S:
1043 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1044 op = ASM_OP_LDF8;
1045 break;
1046 case ASM_OP_LDF8_SA:
1047 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1048 op = ASM_OP_LDF8;
1049 break;
1050 case ASM_OP_LDFD_:
1051 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1052 op = ASM_OP_LDFD;
1053 break;
1054 case ASM_OP_LDFD_A:
1055 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1056 op = ASM_OP_LDFD;
1057 break;
1058 case ASM_OP_LDFD_C_CLR:
1059 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1060 op = ASM_OP_LDFD;
1061 break;
1062 case ASM_OP_LDFD_C_NC:
1063 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1064 op = ASM_OP_LDFD;
1065 break;
1066 case ASM_OP_LDFD_S:
1067 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1068 op = ASM_OP_LDFD;
1069 break;
1070 case ASM_OP_LDFD_SA:
1071 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1072 op = ASM_OP_LDFD;
1073 break;
1074 case ASM_OP_LDFE_:
1075 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1076 op = ASM_OP_LDFE;
1077 break;
1078 case ASM_OP_LDFE_A:
1079 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1080 op = ASM_OP_LDFE;
1081 break;
1082 case ASM_OP_LDFE_C_CLR:
1083 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1084 op = ASM_OP_LDFE;
1085 break;
1086 case ASM_OP_LDFE_C_NC:
1087 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1088 op = ASM_OP_LDFE;
1089 break;
1090 case ASM_OP_LDFE_S:
1091 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1092 op = ASM_OP_LDFE;
1093 break;
1094 case ASM_OP_LDFE_SA:
1095 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1096 op = ASM_OP_LDFE;
1097 break;
1098 case ASM_OP_LDFP8_:
1099 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1100 op = ASM_OP_LDFP8;
1101 break;
1102 case ASM_OP_LDFP8_A:
1103 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1104 op = ASM_OP_LDFP8;
1105 break;
1106 case ASM_OP_LDFP8_C_CLR:
1107 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1108 op = ASM_OP_LDFP8;
1109 break;
1110 case ASM_OP_LDFP8_C_NC:
1111 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1112 op = ASM_OP_LDFP8;
1113 break;
1114 case ASM_OP_LDFP8_S:
1115 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1116 op = ASM_OP_LDFP8;
1117 break;
1118 case ASM_OP_LDFP8_SA:
1119 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1120 op = ASM_OP_LDFP8;
1121 break;
1122 case ASM_OP_LDFPD_:
1123 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1124 op = ASM_OP_LDFPD;
1125 break;
1126 case ASM_OP_LDFPD_A:
1127 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1128 op = ASM_OP_LDFPD;
1129 break;
1130 case ASM_OP_LDFPD_C_CLR:
1131 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1132 op = ASM_OP_LDFPD;
1133 break;
1134 case ASM_OP_LDFPD_C_NC:
1135 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1136 op = ASM_OP_LDFPD;
1137 break;
1138 case ASM_OP_LDFPD_S:
1139 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1140 op = ASM_OP_LDFPD;
1141 break;
1142 case ASM_OP_LDFPD_SA:
1143 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1144 op = ASM_OP_LDFPD;
1145 break;
1146 case ASM_OP_LDFPS_:
1147 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1148 op = ASM_OP_LDFPS;
1149 break;
1150 case ASM_OP_LDFPS_A:
1151 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1152 op = ASM_OP_LDFPS;
1153 break;
1154 case ASM_OP_LDFPS_C_CLR:
1155 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1156 op = ASM_OP_LDFPS;
1157 break;
1158 case ASM_OP_LDFPS_C_NC:
1159 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1160 op = ASM_OP_LDFPS;
1161 break;
1162 case ASM_OP_LDFPS_S:
1163 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1164 op = ASM_OP_LDFPS;
1165 break;
1166 case ASM_OP_LDFPS_SA:
1167 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1168 op = ASM_OP_LDFPS;
1169 break;
1170 case ASM_OP_LDFS_:
1171 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1172 op = ASM_OP_LDFS;
1173 break;
1174 case ASM_OP_LDFS_A:
1175 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1176 op = ASM_OP_LDFS;
1177 break;
1178 case ASM_OP_LDFS_C_CLR:
1179 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1180 op = ASM_OP_LDFS;
1181 break;
1182 case ASM_OP_LDFS_C_NC:
1183 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1184 op = ASM_OP_LDFS;
1185 break;
1186 case ASM_OP_LDFS_S:
1187 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1188 op = ASM_OP_LDFS;
1189 break;
1190 case ASM_OP_LDFS_SA:
1191 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1192 op = ASM_OP_LDFS;
1193 break;
1194 case ASM_OP_LFETCH_:
1195 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_NONE);
1196 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_NONE);
1197 op = ASM_OP_LFETCH;
1198 break;
1199 case ASM_OP_LFETCH_EXCL:
1200 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_NONE);
1201 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_EXCL);
1202 op = ASM_OP_LFETCH;
1203 break;
1204 case ASM_OP_LFETCH_FAULT:
1205 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_FAULT);
1206 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_NONE);
1207 op = ASM_OP_LFETCH;
1208 break;
1209 case ASM_OP_LFETCH_FAULT_EXCL:
1210 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_FAULT);
1211 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_EXCL);
1212 op = ASM_OP_LFETCH;
1213 break;
1214 case ASM_OP_MF_:
1215 asm_cmpltr_add(i, ASM_CC_MF, ASM_CT_NONE);
1216 op = ASM_OP_MF;
1217 break;
1218 case ASM_OP_MF_A:
1219 asm_cmpltr_add(i, ASM_CC_MF, ASM_CT_A);
1220 op = ASM_OP_MF;
1221 break;
1222 case ASM_OP_MIX1_L:
1223 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1224 op = ASM_OP_MIX1;
1225 break;
1226 case ASM_OP_MIX1_R:
1227 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1228 op = ASM_OP_MIX1;
1229 break;
1230 case ASM_OP_MIX2_L:
1231 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1232 op = ASM_OP_MIX2;
1233 break;
1234 case ASM_OP_MIX2_R:
1235 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1236 op = ASM_OP_MIX2;
1237 break;
1238 case ASM_OP_MIX4_L:
1239 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1240 op = ASM_OP_MIX4;
1241 break;
1242 case ASM_OP_MIX4_R:
1243 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1244 op = ASM_OP_MIX4;
1245 break;
1246 case ASM_OP_MOV_:
1247 asm_cmpltr_add(i, ASM_CC_MOV, ASM_CT_NONE);
1248 op = ASM_OP_MOV;
1249 break;
1250 case ASM_OP_MOV_I:
1251 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
1252 op = ASM_OP_MOV;
1253 break;
1254 case ASM_OP_MOV_M:
1255 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
1256 op = ASM_OP_MOV;
1257 break;
1258 case ASM_OP_MOV_RET:
1259 asm_cmpltr_add(i, ASM_CC_MOV, ASM_CT_RET);
1260 op = ASM_OP_MOV;
1261 break;
1262 case ASM_OP_MOV_CPUID:
1263 ot = ASM_OPER_CPUID;
1264 op = ASM_OP_MOV;
1265 break;
1266 case ASM_OP_MOV_DBR:
1267 ot = ASM_OPER_DBR;
1268 op = ASM_OP_MOV;
1269 break;
1270 case ASM_OP_MOV_IBR:
1271 ot = ASM_OPER_IBR;
1272 op = ASM_OP_MOV;
1273 break;
1274 case ASM_OP_MOV_IP:
1275 ot = ASM_OPER_IP;
1276 op = ASM_OP_MOV;
1277 break;
1278 case ASM_OP_MOV_MSR:
1279 ot = ASM_OPER_MSR;
1280 op = ASM_OP_MOV;
1281 break;
1282 case ASM_OP_MOV_PKR:
1283 ot = ASM_OPER_PKR;
1284 op = ASM_OP_MOV;
1285 break;
1286 case ASM_OP_MOV_PMC:
1287 ot = ASM_OPER_PMC;
1288 op = ASM_OP_MOV;
1289 break;
1290 case ASM_OP_MOV_PMD:
1291 ot = ASM_OPER_PMD;
1292 op = ASM_OP_MOV;
1293 break;
1294 case ASM_OP_MOV_PR:
1295 ot = ASM_OPER_PR;
1296 op = ASM_OP_MOV;
1297 break;
1298 case ASM_OP_MOV_PSR:
1299 ot = ASM_OPER_PSR;
1300 op = ASM_OP_MOV;
1301 break;
1302 case ASM_OP_MOV_PSR_L:
1303 ot = ASM_OPER_PSR_L;
1304 op = ASM_OP_MOV;
1305 break;
1306 case ASM_OP_MOV_PSR_UM:
1307 ot = ASM_OPER_PSR_UM;
1308 op = ASM_OP_MOV;
1309 break;
1310 case ASM_OP_MOV_RR:
1311 ot = ASM_OPER_RR;
1312 op = ASM_OP_MOV;
1313 break;
1314 case ASM_OP_NOP_B:
1315 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B);
1316 op = ASM_OP_NOP;
1317 break;
1318 case ASM_OP_NOP_F:
1319 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F);
1320 op = ASM_OP_NOP;
1321 break;
1322 case ASM_OP_NOP_I:
1323 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
1324 op = ASM_OP_NOP;
1325 break;
1326 case ASM_OP_NOP_M:
1327 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
1328 op = ASM_OP_NOP;
1329 break;
1330 case ASM_OP_NOP_X:
1331 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X);
1332 op = ASM_OP_NOP;
1333 break;
1334 case ASM_OP_PACK2_SSS:
1335 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1336 op = ASM_OP_PACK2;
1337 break;
1338 case ASM_OP_PACK2_USS:
1339 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_USS);
1340 op = ASM_OP_PACK2;
1341 break;
1342 case ASM_OP_PACK4_SSS:
1343 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1344 op = ASM_OP_PACK4;
1345 break;
1346 case ASM_OP_PADD1_:
1347 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1348 op = ASM_OP_PADD1;
1349 break;
1350 case ASM_OP_PADD1_SSS:
1351 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1352 op = ASM_OP_PADD1;
1353 break;
1354 case ASM_OP_PADD1_UUS:
1355 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1356 op = ASM_OP_PADD1;
1357 break;
1358 case ASM_OP_PADD1_UUU:
1359 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1360 op = ASM_OP_PADD1;
1361 break;
1362 case ASM_OP_PADD2_:
1363 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1364 op = ASM_OP_PADD2;
1365 break;
1366 case ASM_OP_PADD2_SSS:
1367 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1368 op = ASM_OP_PADD2;
1369 break;
1370 case ASM_OP_PADD2_UUS:
1371 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1372 op = ASM_OP_PADD2;
1373 break;
1374 case ASM_OP_PADD2_UUU:
1375 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1376 op = ASM_OP_PADD2;
1377 break;
1378 case ASM_OP_PAVG1_:
1379 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_NONE);
1380 op = ASM_OP_PAVG1;
1381 break;
1382 case ASM_OP_PAVG1_RAZ:
1383 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_RAZ);
1384 op = ASM_OP_PAVG1;
1385 break;
1386 case ASM_OP_PAVG2_:
1387 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_NONE);
1388 op = ASM_OP_PAVG2;
1389 break;
1390 case ASM_OP_PAVG2_RAZ:
1391 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_RAZ);
1392 op = ASM_OP_PAVG2;
1393 break;
1394 case ASM_OP_PCMP1_EQ:
1395 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
1396 op = ASM_OP_PCMP1;
1397 break;
1398 case ASM_OP_PCMP1_GT:
1399 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
1400 op = ASM_OP_PCMP1;
1401 break;
1402 case ASM_OP_PCMP2_EQ:
1403 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
1404 op = ASM_OP_PCMP2;
1405 break;
1406 case ASM_OP_PCMP2_GT:
1407 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
1408 op = ASM_OP_PCMP2;
1409 break;
1410 case ASM_OP_PCMP4_EQ:
1411 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
1412 op = ASM_OP_PCMP4;
1413 break;
1414 case ASM_OP_PCMP4_GT:
1415 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
1416 op = ASM_OP_PCMP4;
1417 break;
1418 case ASM_OP_PMAX1_U:
1419 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1420 op = ASM_OP_PMAX1;
1421 break;
1422 case ASM_OP_PMIN1_U:
1423 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1424 op = ASM_OP_PMIN1;
1425 break;
1426 case ASM_OP_PMPY2_L:
1427 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1428 op = ASM_OP_PMPY2;
1429 break;
1430 case ASM_OP_PMPY2_R:
1431 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1432 op = ASM_OP_PMPY2;
1433 break;
1434 case ASM_OP_PMPYSHR2_:
1435 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1436 op = ASM_OP_PMPYSHR2;
1437 break;
1438 case ASM_OP_PMPYSHR2_U:
1439 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1440 op = ASM_OP_PMPYSHR2;
1441 break;
1442 case ASM_OP_PROBE_R:
1443 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_R);
1444 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_NONE);
1445 op = ASM_OP_PROBE;
1446 break;
1447 case ASM_OP_PROBE_R_FAULT:
1448 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_R);
1449 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
1450 op = ASM_OP_PROBE;
1451 break;
1452 case ASM_OP_PROBE_RW_FAULT:
1453 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_RW);
1454 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
1455 op = ASM_OP_PROBE;
1456 break;
1457 case ASM_OP_PROBE_W:
1458 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_W);
1459 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_NONE);
1460 op = ASM_OP_PROBE;
1461 break;
1462 case ASM_OP_PROBE_W_FAULT:
1463 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_W);
1464 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
1465 op = ASM_OP_PROBE;
1466 break;
1467 case ASM_OP_PSHR2_:
1468 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1469 op = ASM_OP_PSHR2;
1470 break;
1471 case ASM_OP_PSHR2_U:
1472 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1473 op = ASM_OP_PSHR2;
1474 break;
1475 case ASM_OP_PSHR4_:
1476 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1477 op = ASM_OP_PSHR4;
1478 break;
1479 case ASM_OP_PSHR4_U:
1480 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1481 op = ASM_OP_PSHR4;
1482 break;
1483 case ASM_OP_PSUB1_:
1484 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1485 op = ASM_OP_PSUB1;
1486 break;
1487 case ASM_OP_PSUB1_SSS:
1488 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1489 op = ASM_OP_PSUB1;
1490 break;
1491 case ASM_OP_PSUB1_UUS:
1492 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1493 op = ASM_OP_PSUB1;
1494 break;
1495 case ASM_OP_PSUB1_UUU:
1496 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1497 op = ASM_OP_PSUB1;
1498 break;
1499 case ASM_OP_PSUB2_:
1500 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1501 op = ASM_OP_PSUB2;
1502 break;
1503 case ASM_OP_PSUB2_SSS:
1504 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1505 op = ASM_OP_PSUB2;
1506 break;
1507 case ASM_OP_PSUB2_UUS:
1508 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1509 op = ASM_OP_PSUB2;
1510 break;
1511 case ASM_OP_PSUB2_UUU:
1512 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1513 op = ASM_OP_PSUB2;
1514 break;
1515 case ASM_OP_PTC_E:
1516 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_E);
1517 op = ASM_OP_PTC;
1518 break;
1519 case ASM_OP_PTC_G:
1520 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_G);
1521 op = ASM_OP_PTC;
1522 break;
1523 case ASM_OP_PTC_GA:
1524 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_GA);
1525 op = ASM_OP_PTC;
1526 break;
1527 case ASM_OP_PTC_L:
1528 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_L);
1529 op = ASM_OP_PTC;
1530 break;
1531 case ASM_OP_PTR_D:
1532 asm_cmpltr_add(i, ASM_CC_PTR, ASM_CT_D);
1533 op = ASM_OP_PTR;
1534 break;
1535 case ASM_OP_PTR_I:
1536 asm_cmpltr_add(i, ASM_CC_PTR, ASM_CT_I);
1537 op = ASM_OP_PTR;
1538 break;
1539 case ASM_OP_SETF_D:
1540 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_D);
1541 op = ASM_OP_SETF;
1542 break;
1543 case ASM_OP_SETF_EXP:
1544 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_EXP);
1545 op = ASM_OP_SETF;
1546 break;
1547 case ASM_OP_SETF_S:
1548 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_S);
1549 op = ASM_OP_SETF;
1550 break;
1551 case ASM_OP_SETF_SIG:
1552 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_SIG);
1553 op = ASM_OP_SETF;
1554 break;
1555 case ASM_OP_SHR_:
1556 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1557 op = ASM_OP_SHR;
1558 break;
1559 case ASM_OP_SHR_U:
1560 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1561 op = ASM_OP_SHR;
1562 break;
1563 case ASM_OP_SRLZ_D:
1564 asm_cmpltr_add(i, ASM_CC_SRLZ, ASM_CT_D);
1565 op = ASM_OP_SRLZ;
1566 break;
1567 case ASM_OP_SRLZ_I:
1568 asm_cmpltr_add(i, ASM_CC_SRLZ, ASM_CT_I);
1569 op = ASM_OP_SRLZ;
1570 break;
1571 case ASM_OP_ST1_:
1572 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1573 op = ASM_OP_ST1;
1574 break;
1575 case ASM_OP_ST1_REL:
1576 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1577 op = ASM_OP_ST1;
1578 break;
1579 case ASM_OP_ST16_:
1580 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1581 op = ASM_OP_ST16;
1582 break;
1583 case ASM_OP_ST16_REL:
1584 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1585 op = ASM_OP_ST16;
1586 break;
1587 case ASM_OP_ST2_:
1588 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1589 op = ASM_OP_ST2;
1590 break;
1591 case ASM_OP_ST2_REL:
1592 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1593 op = ASM_OP_ST2;
1594 break;
1595 case ASM_OP_ST4_:
1596 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1597 op = ASM_OP_ST4;
1598 break;
1599 case ASM_OP_ST4_REL:
1600 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1601 op = ASM_OP_ST4;
1602 break;
1603 case ASM_OP_ST8_:
1604 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1605 op = ASM_OP_ST8;
1606 break;
1607 case ASM_OP_ST8_REL:
1608 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1609 op = ASM_OP_ST8;
1610 break;
1611 case ASM_OP_ST8_SPILL:
1612 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_SPILL);
1613 op = ASM_OP_ST8;
1614 break;
1615 case ASM_OP_STF_SPILL:
1616 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_SPILL);
1617 op = ASM_OP_STF;
1618 break;
1619 case ASM_OP_SYNC_I:
1620 asm_cmpltr_add(i, ASM_CC_SYNC, ASM_CT_I);
1621 op = ASM_OP_SYNC;
1622 break;
1623 case ASM_OP_TBIT_NZ_AND:
1624 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1625 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1626 op = ASM_OP_TBIT;
1627 break;
1628 case ASM_OP_TBIT_NZ_OR:
1629 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1630 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1631 op = ASM_OP_TBIT;
1632 break;
1633 case ASM_OP_TBIT_NZ_OR_ANDCM:
1634 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1635 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1636 op = ASM_OP_TBIT;
1637 break;
1638 case ASM_OP_TBIT_Z:
1639 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1640 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
1641 op = ASM_OP_TBIT;
1642 break;
1643 case ASM_OP_TBIT_Z_AND:
1644 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1645 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1646 op = ASM_OP_TBIT;
1647 break;
1648 case ASM_OP_TBIT_Z_OR:
1649 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1650 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1651 op = ASM_OP_TBIT;
1652 break;
1653 case ASM_OP_TBIT_Z_OR_ANDCM:
1654 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1655 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1656 op = ASM_OP_TBIT;
1657 break;
1658 case ASM_OP_TBIT_Z_UNC:
1659 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1660 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
1661 op = ASM_OP_TBIT;
1662 break;
1663 case ASM_OP_TF_NZ_AND:
1664 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1665 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1666 op = ASM_OP_TF;
1667 break;
1668 case ASM_OP_TF_NZ_OR:
1669 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1670 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1671 op = ASM_OP_TF;
1672 break;
1673 case ASM_OP_TF_NZ_OR_ANDCM:
1674 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1675 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1676 op = ASM_OP_TF;
1677 break;
1678 case ASM_OP_TF_Z:
1679 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1680 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
1681 op = ASM_OP_TF;
1682 break;
1683 case ASM_OP_TF_Z_AND:
1684 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1685 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1686 op = ASM_OP_TF;
1687 break;
1688 case ASM_OP_TF_Z_OR:
1689 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1690 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1691 op = ASM_OP_TF;
1692 break;
1693 case ASM_OP_TF_Z_OR_ANDCM:
1694 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1695 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1696 op = ASM_OP_TF;
1697 break;
1698 case ASM_OP_TF_Z_UNC:
1699 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1700 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
1701 op = ASM_OP_TF;
1702 break;
1703 case ASM_OP_TNAT_NZ_AND:
1704 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1705 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1706 op = ASM_OP_TNAT;
1707 break;
1708 case ASM_OP_TNAT_NZ_OR:
1709 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1710 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1711 op = ASM_OP_TNAT;
1712 break;
1713 case ASM_OP_TNAT_NZ_OR_ANDCM:
1714 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1715 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1716 op = ASM_OP_TNAT;
1717 break;
1718 case ASM_OP_TNAT_Z:
1719 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1720 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
1721 op = ASM_OP_TNAT;
1722 break;
1723 case ASM_OP_TNAT_Z_AND:
1724 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1725 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1726 op = ASM_OP_TNAT;
1727 break;
1728 case ASM_OP_TNAT_Z_OR:
1729 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1730 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1731 op = ASM_OP_TNAT;
1732 break;
1733 case ASM_OP_TNAT_Z_OR_ANDCM:
1734 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1735 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1736 op = ASM_OP_TNAT;
1737 break;
1738 case ASM_OP_TNAT_Z_UNC:
1739 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1740 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
1741 op = ASM_OP_TNAT;
1742 break;
1743 case ASM_OP_UNPACK1_H:
1744 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
1745 op = ASM_OP_UNPACK1;
1746 break;
1747 case ASM_OP_UNPACK1_L:
1748 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
1749 op = ASM_OP_UNPACK1;
1750 break;
1751 case ASM_OP_UNPACK2_H:
1752 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
1753 op = ASM_OP_UNPACK2;
1754 break;
1755 case ASM_OP_UNPACK2_L:
1756 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
1757 op = ASM_OP_UNPACK2;
1758 break;
1759 case ASM_OP_UNPACK4_H:
1760 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
1761 op = ASM_OP_UNPACK4;
1762 break;
1763 case ASM_OP_UNPACK4_L:
1764 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
1765 op = ASM_OP_UNPACK4;
1766 break;
1767 case ASM_OP_VMSW_0:
1768 asm_cmpltr_add(i, ASM_CC_VMSW, ASM_CT_0);
1769 op = ASM_OP_VMSW;
1770 break;
1771 case ASM_OP_VMSW_1:
1772 asm_cmpltr_add(i, ASM_CC_VMSW, ASM_CT_1);
1773 op = ASM_OP_VMSW;
1774 break;
1775 case ASM_OP_XMA_H:
1776 asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_H);
1777 op = ASM_OP_XMA;
1778 break;
1779 case ASM_OP_XMA_HU:
1780 asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_HU);
1781 op = ASM_OP_XMA;
1782 break;
1783 case ASM_OP_XMA_L:
1784 asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_L);
1785 op = ASM_OP_XMA;
1786 break;
1787 default:
1788 KASSERT(op < ASM_OP_NUMBER_OF_OPCODES);
1789 break;
1790 }
1791 i->i_op = op;
1792 return (ot);
1793 }
1794
1795 static __inline void
op_imm(struct asm_inst * i,int op,uint64_t val)1796 op_imm(struct asm_inst *i, int op, uint64_t val)
1797 {
1798 i->i_oper[op].o_type = ASM_OPER_IMM;
1799 i->i_oper[op].o_value = val;
1800 }
1801
1802 static __inline void
op_type(struct asm_inst * i,int op,enum asm_oper_type ot)1803 op_type(struct asm_inst *i, int op, enum asm_oper_type ot)
1804 {
1805 i->i_oper[op].o_type = ot;
1806 }
1807
1808 static __inline void
op_value(struct asm_inst * i,int op,uint64_t val)1809 op_value(struct asm_inst *i, int op, uint64_t val)
1810 {
1811 i->i_oper[op].o_value = val;
1812 }
1813
1814 static __inline void
operand(struct asm_inst * i,int op,enum asm_oper_type ot,uint64_t bits,int o,int l)1815 operand(struct asm_inst *i, int op, enum asm_oper_type ot, uint64_t bits,
1816 int o, int l)
1817 {
1818 i->i_oper[op].o_type = ot;
1819 i->i_oper[op].o_value = FIELD(bits, o, l);
1820 }
1821
1822 static uint64_t
imm(uint64_t bits,int sign,int o,int l)1823 imm(uint64_t bits, int sign, int o, int l)
1824 {
1825 uint64_t val = FIELD(bits, o, l);
1826
1827 if (sign && (val & (1LL << (l - 1))) != 0)
1828 val |= -1LL << l;
1829 return (val);
1830 }
1831
1832 static void
s_imm(struct asm_inst * i,int op,uint64_t bits,int o,int l)1833 s_imm(struct asm_inst *i, int op, uint64_t bits, int o, int l)
1834 {
1835 i->i_oper[op].o_type = ASM_OPER_IMM;
1836 i->i_oper[op].o_value = imm(bits, 1, o, l);
1837 }
1838
1839 static void
u_imm(struct asm_inst * i,int op,uint64_t bits,int o,int l)1840 u_imm(struct asm_inst *i, int op, uint64_t bits, int o, int l)
1841 {
1842 i->i_oper[op].o_type = ASM_OPER_IMM;
1843 i->i_oper[op].o_value = imm(bits, 0, o, l);
1844 }
1845
1846 static uint64_t
vimm(uint64_t bits,int sign,va_list ap)1847 vimm(uint64_t bits, int sign, va_list ap)
1848 {
1849 uint64_t val = 0;
1850 int len = 0;
1851 int frag;
1852
1853 while ((frag = va_arg(ap, int)) != 0) {
1854 val |= (uint64_t)FIELD(bits, FRAG_OFS(frag), FRAG_LEN(frag))
1855 << len;
1856 len += FRAG_LEN(frag);
1857 }
1858 if (sign && (val & (1LL << (len - 1))) != 0)
1859 val |= -1LL << len;
1860 return (val);
1861 }
1862
1863 static void
s_immf(struct asm_inst * i,int op,uint64_t bits,...)1864 s_immf(struct asm_inst *i, int op, uint64_t bits, ...)
1865 {
1866 va_list ap;
1867 va_start(ap, bits);
1868 i->i_oper[op].o_type = ASM_OPER_IMM;
1869 i->i_oper[op].o_value = vimm(bits, 1, ap);
1870 va_end(ap);
1871 }
1872
1873 static void
u_immf(struct asm_inst * i,int op,uint64_t bits,...)1874 u_immf(struct asm_inst *i, int op, uint64_t bits, ...)
1875 {
1876 va_list ap;
1877 va_start(ap, bits);
1878 i->i_oper[op].o_type = ASM_OPER_IMM;
1879 i->i_oper[op].o_value = vimm(bits, 0, ap);
1880 va_end(ap);
1881 }
1882
1883 static void
disp(struct asm_inst * i,int op,uint64_t bits,...)1884 disp(struct asm_inst *i, int op, uint64_t bits, ...)
1885 {
1886 va_list ap;
1887 va_start(ap, bits);
1888 i->i_oper[op].o_type = ASM_OPER_DISP;
1889 i->i_oper[op].o_value = vimm(bits, 1, ap) << 4;
1890 va_end(ap);
1891 }
1892
1893 static __inline void
combine(uint64_t * dst,int dl,uint64_t src,int sl,int so)1894 combine(uint64_t *dst, int dl, uint64_t src, int sl, int so)
1895 {
1896 *dst = (*dst & ((1LL << dl) - 1LL)) |
1897 ((uint64_t)_FLD64(src, so, sl) << dl);
1898 }
1899
1900 int
asm_extract(enum asm_op op,enum asm_fmt fmt,uint64_t bits,struct asm_bundle * b,int slot)1901 asm_extract(enum asm_op op, enum asm_fmt fmt, uint64_t bits,
1902 struct asm_bundle *b, int slot)
1903 {
1904 struct asm_inst *i = b->b_inst + slot;
1905 enum asm_oper_type ot;
1906
1907 KASSERT(op != ASM_OP_NONE);
1908 i->i_bits = bits;
1909 i->i_format = fmt;
1910 i->i_srcidx = 2;
1911
1912 ot = asm_normalize(i, op);
1913
1914 if (fmt != ASM_FMT_B6 && fmt != ASM_FMT_B7)
1915 operand(i, 0, ASM_OPER_PREG, bits, 0, 6);
1916
1917 switch (fmt) {
1918 case ASM_FMT_A1:
1919 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1920 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1921 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1922 if ((op == ASM_OP_ADD && FIELD(bits, 27, 2) == 1) ||
1923 (op == ASM_OP_SUB && FIELD(bits, 27, 2) == 0))
1924 op_imm(i, 4, 1LL);
1925 break;
1926 case ASM_FMT_A2:
1927 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1928 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1929 op_imm(i, 3, 1LL + FIELD(bits, 27, 2));
1930 operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1931 break;
1932 case ASM_FMT_A3:
1933 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1934 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
1935 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1936 break;
1937 case ASM_FMT_A4:
1938 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1939 s_immf(i, 2, bits, FRAG(13,7), FRAG(27,6), FRAG(36,1), 0);
1940 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1941 break;
1942 case ASM_FMT_A5:
1943 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1944 s_immf(i, 2, bits, FRAG(13,7), FRAG(27,9), FRAG(22,5),
1945 FRAG(36,1), 0);
1946 operand(i, 3, ASM_OPER_GREG, bits, 20, 2);
1947 break;
1948 case ASM_FMT_A6: /* 2 dst */
1949 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
1950 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
1951 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
1952 operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1953 i->i_srcidx++;
1954 break;
1955 case ASM_FMT_A7: /* 2 dst */
1956 if (FIELD(bits, 13, 7) != 0)
1957 return (0);
1958 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
1959 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
1960 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
1961 operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1962 i->i_srcidx++;
1963 break;
1964 case ASM_FMT_A8: /* 2 dst */
1965 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
1966 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
1967 s_immf(i, 3, bits, FRAG(13,7), FRAG(36,1), 0);
1968 operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1969 i->i_srcidx++;
1970 break;
1971 case ASM_FMT_A9:
1972 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1973 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1974 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1975 break;
1976 case ASM_FMT_A10:
1977 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1978 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1979 op_imm(i, 3, 1LL + FIELD(bits, 27, 2));
1980 operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1981 break;
1982 case ASM_FMT_B1: /* 0 dst */
1983 asm_brhint(i);
1984 disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
1985 break;
1986 case ASM_FMT_B2: /* 0 dst */
1987 if (FIELD(bits, 0, 6) != 0)
1988 return (0);
1989 asm_brhint(i);
1990 disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
1991 break;
1992 case ASM_FMT_B3:
1993 asm_brhint(i);
1994 operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
1995 disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
1996 break;
1997 case ASM_FMT_B4: /* 0 dst */
1998 asm_brhint(i);
1999 operand(i, 1, ASM_OPER_BREG, bits, 13, 3);
2000 break;
2001 case ASM_FMT_B5:
2002 #if 0
2003 if (FIELD(bits, 32, 1) == 0)
2004 return (0);
2005 #endif
2006 asm_brhint(i);
2007 operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
2008 operand(i, 2, ASM_OPER_BREG, bits, 13, 3);
2009 break;
2010 case ASM_FMT_B6: /* 0 dst */
2011 asm_brphint(i);
2012 disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
2013 disp(i, 2, bits, FRAG(6,7), FRAG(33,2), 0);
2014 i->i_srcidx--;
2015 break;
2016 case ASM_FMT_B7: /* 0 dst */
2017 asm_brphint(i);
2018 operand(i, 1, ASM_OPER_BREG, bits, 13, 3);
2019 disp(i, 2, bits, FRAG(6,7), FRAG(33,2), 0);
2020 i->i_srcidx--;
2021 break;
2022 case ASM_FMT_B8:
2023 /* no operands */
2024 break;
2025 case ASM_FMT_B9: /* 0 dst */
2026 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2027 break;
2028 case ASM_FMT_F1:
2029 asm_sf(i);
2030 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2031 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2032 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2033 operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
2034 break;
2035 case ASM_FMT_F2:
2036 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2037 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2038 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2039 operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
2040 break;
2041 case ASM_FMT_F3:
2042 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2043 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2044 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2045 operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
2046 break;
2047 case ASM_FMT_F4: /* 2 dst */
2048 if (FIELD(bits, 33, 1)) { /* ra */
2049 if (FIELD(bits, 36, 1)) /* rb */
2050 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_UNORD);
2051 else
2052 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LE);
2053 } else {
2054 if (FIELD(bits, 36, 1)) /* rb */
2055 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LT);
2056 else
2057 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_EQ);
2058 }
2059 if (FIELD(bits, 12, 1)) /* ta */
2060 asm_cmpltr_add(i, ASM_CC_FCTYPE, ASM_CT_UNC);
2061 else
2062 asm_cmpltr_add(i, ASM_CC_FCTYPE, ASM_CT_NONE);
2063 asm_sf(i);
2064 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2065 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2066 operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
2067 operand(i, 4, ASM_OPER_FREG, bits, 20, 7);
2068 i->i_srcidx++;
2069 break;
2070 case ASM_FMT_F5: /* 2 dst */
2071 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2072 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2073 operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
2074 u_immf(i, 4, bits, FRAG(33,2), FRAG(20,7), 0);
2075 i->i_srcidx++;
2076 break;
2077 case ASM_FMT_F6: /* 2 dst */
2078 asm_sf(i);
2079 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2080 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2081 operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
2082 operand(i, 4, ASM_OPER_FREG, bits, 20, 7);
2083 i->i_srcidx++;
2084 break;
2085 case ASM_FMT_F7: /* 2 dst */
2086 asm_sf(i);
2087 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2088 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2089 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2090 i->i_srcidx++;
2091 break;
2092 case ASM_FMT_F8:
2093 asm_sf(i);
2094 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2095 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2096 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2097 break;
2098 case ASM_FMT_F9:
2099 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2100 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2101 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2102 break;
2103 case ASM_FMT_F10:
2104 asm_sf(i);
2105 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2106 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2107 break;
2108 case ASM_FMT_F11:
2109 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2110 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2111 break;
2112 case ASM_FMT_F12: /* 0 dst */
2113 asm_sf(i);
2114 u_imm(i, 1, bits, 13, 7);
2115 u_imm(i, 2, bits, 20, 7);
2116 i->i_srcidx--;
2117 break;
2118 case ASM_FMT_F13:
2119 asm_sf(i);
2120 /* no operands */
2121 break;
2122 case ASM_FMT_F14: /* 0 dst */
2123 asm_sf(i);
2124 disp(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2125 break;
2126 case ASM_FMT_F15: /* 0 dst */
2127 u_imm(i, 1, bits, 6, 20);
2128 break;
2129 case ASM_FMT_F16: /* 0 dst */
2130 u_imm(i, 1, bits, 6, 20);
2131 break;
2132 case ASM_FMT_I1:
2133 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2134 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2135 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2136 switch (FIELD(bits, 30, 2)) {
2137 case 0: op_imm(i, 4, 0LL); break;
2138 case 1: op_imm(i, 4, 7LL); break;
2139 case 2: op_imm(i, 4, 15LL); break;
2140 case 3: op_imm(i, 4, 16LL); break;
2141 }
2142 break;
2143 case ASM_FMT_I2:
2144 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2145 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2146 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2147 break;
2148 case ASM_FMT_I3:
2149 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2150 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2151 u_imm(i, 3, bits, 20, 4);
2152 break;
2153 case ASM_FMT_I4:
2154 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2155 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2156 u_imm(i, 3, bits, 20, 8);
2157 break;
2158 case ASM_FMT_I5:
2159 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2160 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2161 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2162 break;
2163 case ASM_FMT_I6:
2164 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2165 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2166 u_imm(i, 3, bits, 14, 5);
2167 break;
2168 case ASM_FMT_I7:
2169 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2170 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2171 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2172 break;
2173 case ASM_FMT_I8:
2174 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2175 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2176 op_imm(i, 3, 31LL - FIELD(bits, 20, 5));
2177 break;
2178 case ASM_FMT_I9:
2179 if (FIELD(bits, 13, 7) != 0)
2180 return (0);
2181 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2182 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2183 break;
2184 case ASM_FMT_I10:
2185 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2186 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2187 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2188 u_imm(i, 4, bits, 27, 6);
2189 break;
2190 case ASM_FMT_I11:
2191 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2192 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2193 u_imm(i, 3, bits, 14, 6);
2194 op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
2195 break;
2196 case ASM_FMT_I12:
2197 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2198 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2199 op_imm(i, 3, 63LL - FIELD(bits, 20, 6));
2200 op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
2201 break;
2202 case ASM_FMT_I13:
2203 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2204 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
2205 op_imm(i, 3, 63LL - FIELD(bits, 20, 6));
2206 op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
2207 break;
2208 case ASM_FMT_I14:
2209 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2210 s_imm(i, 2, bits, 36, 1);
2211 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2212 op_imm(i, 4, 63LL - FIELD(bits, 14, 6));
2213 op_imm(i, 5, 1LL + FIELD(bits, 27, 6));
2214 break;
2215 case ASM_FMT_I15:
2216 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2217 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2218 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2219 op_imm(i, 4, 63LL - FIELD(bits, 31, 6));
2220 op_imm(i, 5, 1LL + FIELD(bits, 27, 4));
2221 break;
2222 case ASM_FMT_I16: /* 2 dst */
2223 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2224 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2225 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2226 u_imm(i, 4, bits, 14, 6);
2227 i->i_srcidx++;
2228 break;
2229 case ASM_FMT_I17: /* 2 dst */
2230 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2231 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2232 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2233 i->i_srcidx++;
2234 break;
2235 case ASM_FMT_I18:
2236 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2237 break;
2238 case ASM_FMT_I19:
2239 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2240 break;
2241 case ASM_FMT_I20: /* 0 dst */
2242 operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
2243 disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
2244 i->i_srcidx--;
2245 break;
2246 case ASM_FMT_I21:
2247 switch (FIELD(bits, 20, 2)) { /* wh */
2248 case 0: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_SPTK); break;
2249 case 1: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_NONE); break;
2250 case 2: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_DPTK); break;
2251 case 3: return (0);
2252 }
2253 if (FIELD(bits, 23, 1)) /* ih */
2254 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_IMP);
2255 else
2256 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_NONE);
2257 operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
2258 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2259 disp(i, 3, bits, FRAG(24,9), 0);
2260 break;
2261 case ASM_FMT_I22:
2262 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2263 operand(i, 2, ASM_OPER_BREG, bits, 13, 3);
2264 break;
2265 case ASM_FMT_I23:
2266 op_type(i, 1, ASM_OPER_PR);
2267 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2268 u_immf(i, 3, bits, FRAG(6,7), FRAG(24,8), FRAG(36,1), 0);
2269 i->i_oper[3].o_value <<= 1;
2270 break;
2271 case ASM_FMT_I24:
2272 op_type(i, 1, ASM_OPER_PR_ROT);
2273 s_immf(i, 2, bits, FRAG(6,27), FRAG(36,1), 0);
2274 break;
2275 case ASM_FMT_I25:
2276 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2277 op_type(i, 2, ot);
2278 break;
2279 case ASM_FMT_I26:
2280 operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2281 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2282 break;
2283 case ASM_FMT_I27:
2284 operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2285 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
2286 break;
2287 case ASM_FMT_I28:
2288 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2289 operand(i, 2, ASM_OPER_AREG, bits, 20, 7);
2290 break;
2291 case ASM_FMT_I29:
2292 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2293 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2294 break;
2295 case ASM_FMT_I30: /* 2 dst */
2296 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2297 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2298 op_imm(i, 3, 32LL + FIELD(bits, 14, 5));
2299 i->i_srcidx++;
2300 break;
2301 case ASM_FMT_M1:
2302 asm_hint(i, ASM_CC_LDHINT);
2303 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2304 if (i->i_op == ASM_OP_LD16) {
2305 op_type(i, 2, ASM_OPER_AREG);
2306 op_value(i, 2, AR_CSD);
2307 i->i_srcidx++;
2308 }
2309 operand(i, i->i_srcidx, ASM_OPER_MEM, bits, 20, 7);
2310 break;
2311 case ASM_FMT_M2:
2312 asm_hint(i, ASM_CC_LDHINT);
2313 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2314 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2315 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2316 break;
2317 case ASM_FMT_M3:
2318 asm_hint(i, ASM_CC_LDHINT);
2319 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2320 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2321 s_immf(i, 3, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
2322 break;
2323 case ASM_FMT_M4:
2324 asm_hint(i, ASM_CC_STHINT);
2325 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2326 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2327 if (i->i_op == ASM_OP_ST16) {
2328 op_type(i, 3, ASM_OPER_AREG);
2329 op_value(i, 3, AR_CSD);
2330 }
2331 break;
2332 case ASM_FMT_M5:
2333 asm_hint(i, ASM_CC_STHINT);
2334 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2335 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2336 s_immf(i, 3, bits, FRAG(6,7), FRAG(27,1), FRAG(36,1), 0);
2337 break;
2338 case ASM_FMT_M6:
2339 asm_hint(i, ASM_CC_LDHINT);
2340 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2341 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2342 break;
2343 case ASM_FMT_M7:
2344 asm_hint(i, ASM_CC_LDHINT);
2345 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2346 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2347 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2348 break;
2349 case ASM_FMT_M8:
2350 asm_hint(i, ASM_CC_LDHINT);
2351 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2352 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2353 s_immf(i, 3, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
2354 break;
2355 case ASM_FMT_M9:
2356 asm_hint(i, ASM_CC_STHINT);
2357 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2358 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2359 break;
2360 case ASM_FMT_M10:
2361 asm_hint(i, ASM_CC_STHINT);
2362 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2363 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2364 s_immf(i, 3, bits, FRAG(6,7), FRAG(27,1), FRAG(36,1), 0);
2365 break;
2366 case ASM_FMT_M11: /* 2 dst */
2367 asm_hint(i, ASM_CC_LDHINT);
2368 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2369 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2370 operand(i, 3, ASM_OPER_MEM, bits, 20, 7);
2371 i->i_srcidx++;
2372 break;
2373 case ASM_FMT_M12: /* 2 dst */
2374 asm_hint(i, ASM_CC_LDHINT);
2375 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2376 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2377 operand(i, 3, ASM_OPER_MEM, bits, 20, 7);
2378 op_imm(i, 4, 8LL << FIELD(bits, 30, 1));
2379 i->i_srcidx++;
2380 break;
2381 case ASM_FMT_M13:
2382 asm_hint(i, ASM_CC_LFHINT);
2383 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2384 break;
2385 case ASM_FMT_M14: /* 0 dst */
2386 asm_hint(i, ASM_CC_LFHINT);
2387 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2388 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2389 i->i_srcidx--;
2390 break;
2391 case ASM_FMT_M15: /* 0 dst */
2392 asm_hint(i, ASM_CC_LFHINT);
2393 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2394 s_immf(i, 2, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
2395 i->i_srcidx--;
2396 break;
2397 case ASM_FMT_M16:
2398 asm_hint(i, ASM_CC_LDHINT);
2399 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2400 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2401 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2402 if (i->i_op == ASM_OP_CMP8XCHG16) {
2403 op_type(i, 4, ASM_OPER_AREG);
2404 op_value(i, 4, AR_CSD);
2405 op_type(i, 5, ASM_OPER_AREG);
2406 op_value(i, 5, AR_CCV);
2407 } else {
2408 if (FIELD(bits, 30, 6) < 8) {
2409 op_type(i, 4, ASM_OPER_AREG);
2410 op_value(i, 4, AR_CCV);
2411 }
2412 }
2413 break;
2414 case ASM_FMT_M17:
2415 asm_hint(i, ASM_CC_LDHINT);
2416 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2417 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2418 switch (FIELD(bits, 13, 2)) {
2419 case 0: op_imm(i, 3, 1LL << 4); break;
2420 case 1: op_imm(i, 3, 1LL << 3); break;
2421 case 2: op_imm(i, 3, 1LL << 2); break;
2422 case 3: op_imm(i, 3, 1LL); break;
2423 }
2424 if (FIELD(bits, 15, 1))
2425 i->i_oper[3].o_value *= -1LL;
2426 break;
2427 case ASM_FMT_M18:
2428 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2429 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2430 break;
2431 case ASM_FMT_M19:
2432 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2433 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2434 break;
2435 case ASM_FMT_M20: /* 0 dst */
2436 operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
2437 disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
2438 i->i_srcidx--;
2439 break;
2440 case ASM_FMT_M21: /* 0 dst */
2441 operand(i, 1, ASM_OPER_FREG, bits, 13, 7);
2442 disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
2443 i->i_srcidx--;
2444 break;
2445 case ASM_FMT_M22: /* 0 dst */
2446 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2447 disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
2448 i->i_srcidx--;
2449 break;
2450 case ASM_FMT_M23: /* 0 dst */
2451 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2452 disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
2453 i->i_srcidx--;
2454 break;
2455 case ASM_FMT_M24:
2456 /* no operands */
2457 break;
2458 case ASM_FMT_M25:
2459 if (FIELD(bits, 0, 6) != 0)
2460 return (0);
2461 /* no operands */
2462 break;
2463 case ASM_FMT_M26:
2464 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2465 break;
2466 case ASM_FMT_M27:
2467 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2468 break;
2469 case ASM_FMT_M28:
2470 operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2471 break;
2472 case ASM_FMT_M29:
2473 operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2474 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2475 break;
2476 case ASM_FMT_M30:
2477 operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2478 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
2479 break;
2480 case ASM_FMT_M31:
2481 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2482 operand(i, 2, ASM_OPER_AREG, bits, 20, 7);
2483 break;
2484 case ASM_FMT_M32:
2485 operand(i, 1, ASM_OPER_CREG, bits, 20, 7);
2486 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2487 break;
2488 case ASM_FMT_M33:
2489 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2490 operand(i, 2, ASM_OPER_CREG, bits, 20, 7);
2491 break;
2492 case ASM_FMT_M34: {
2493 uint64_t loc, out;
2494 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2495 op_type(i, 2, ASM_OPER_AREG);
2496 op_value(i, 2, AR_PFS);
2497 loc = FIELD(bits, 20, 7);
2498 out = FIELD(bits, 13, 7) - loc;
2499 op_imm(i, 3, 0);
2500 op_imm(i, 4, loc);
2501 op_imm(i, 5, out);
2502 op_imm(i, 6, (uint64_t)FIELD(bits, 27, 4) << 3);
2503 break;
2504 }
2505 case ASM_FMT_M35:
2506 if (FIELD(bits, 27, 6) == 0x2D)
2507 op_type(i, 1, ASM_OPER_PSR_L);
2508 else
2509 op_type(i, 1, ASM_OPER_PSR_UM);
2510 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2511 break;
2512 case ASM_FMT_M36:
2513 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2514 if (FIELD(bits, 27, 6) == 0x25)
2515 op_type(i, 2, ASM_OPER_PSR);
2516 else
2517 op_type(i, 2, ASM_OPER_PSR_UM);
2518 break;
2519 case ASM_FMT_M37:
2520 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2521 break;
2522 case ASM_FMT_M38:
2523 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2524 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2525 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2526 break;
2527 case ASM_FMT_M39:
2528 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2529 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2530 u_imm(i, 3, bits, 13, 2);
2531 break;
2532 case ASM_FMT_M40: /* 0 dst */
2533 operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2534 u_imm(i, 2, bits, 13, 2);
2535 i->i_srcidx--;
2536 break;
2537 case ASM_FMT_M41:
2538 operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
2539 break;
2540 case ASM_FMT_M42:
2541 operand(i, 1, ot, bits, 20, 7);
2542 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2543 break;
2544 case ASM_FMT_M43:
2545 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2546 operand(i, 2, ot, bits, 20, 7);
2547 break;
2548 case ASM_FMT_M44:
2549 u_immf(i, 1, bits, FRAG(6,21), FRAG(31,2), FRAG(36,1), 0);
2550 break;
2551 case ASM_FMT_M45: /* 0 dst */
2552 operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2553 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2554 i->i_srcidx--;
2555 break;
2556 case ASM_FMT_M46:
2557 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2558 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2559 break;
2560 case ASM_FMT_M47:
2561 operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2562 break;
2563 case ASM_FMT_M48:
2564 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2565 break;
2566 case ASM_FMT_X1:
2567 KASSERT(slot == 2);
2568 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2569 combine(&i->i_oper[1].o_value, 21, b->b_inst[1].i_bits, 41, 0);
2570 break;
2571 case ASM_FMT_X2:
2572 KASSERT(slot == 2);
2573 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2574 u_immf(i, 2, bits, FRAG(13,7), FRAG(27,9), FRAG(22,5),
2575 FRAG(21,1), 0);
2576 combine(&i->i_oper[2].o_value, 22, b->b_inst[1].i_bits, 41, 0);
2577 combine(&i->i_oper[2].o_value, 63, bits, 1, 36);
2578 break;
2579 case ASM_FMT_X3:
2580 KASSERT(slot == 2);
2581 asm_brhint(i);
2582 u_imm(i, 1, bits, 13, 20);
2583 combine(&i->i_oper[1].o_value, 20, b->b_inst[1].i_bits, 39, 2);
2584 combine(&i->i_oper[1].o_value, 59, bits, 1, 36);
2585 i->i_oper[1].o_value <<= 4;
2586 i->i_oper[1].o_type = ASM_OPER_DISP;
2587 break;
2588 case ASM_FMT_X4:
2589 KASSERT(slot == 2);
2590 asm_brhint(i);
2591 operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
2592 u_imm(i, 2, bits, 13, 20);
2593 combine(&i->i_oper[2].o_value, 20, b->b_inst[1].i_bits, 39, 2);
2594 combine(&i->i_oper[2].o_value, 59, bits, 1, 36);
2595 i->i_oper[2].o_value <<= 4;
2596 i->i_oper[2].o_type = ASM_OPER_DISP;
2597 break;
2598 case ASM_FMT_X5:
2599 KASSERT(slot == 2);
2600 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2601 combine(&i->i_oper[1].o_value, 21, b->b_inst[1].i_bits, 41, 0);
2602 break;
2603 default:
2604 KASSERT(fmt == ASM_FMT_NONE);
2605 return (0);
2606 }
2607
2608 return (1);
2609 }
2610