| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86FixupSetCC.cpp | 114 Register ZeroReg = MRI->createVirtualRegister(RC); in runOnMachineFunction() local
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| H A D | X86FrameLowering.cpp | 800 ZeroReg = InProlog ? X86::RCX in emitStackProbeInlineWindowsCoreCLR64() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/Mips/ |
| H A D | Target.cpp | 74 unsigned ZeroReg; in loadImmediate() local
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| /netbsd-src/external/gpl3/gcc/dist/libphobos/libdruntime/core/internal/ |
| H A D | atomic.d | 131 enum ZeroReg = SizedReg!(DX, T); in version() local
150 enum ZeroReg = SizedReg!(DX, T); in version() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 3205 unsigned Opcode, unsigned ZeroReg, in copyGPRRegTuple()
4504 unsigned CombineOpc, unsigned ZeroReg = 0, in canCombine()
4533 unsigned MulOpc, unsigned ZeroReg) { in canCombineWithMUL()
4595 MachineCombinerPattern Pattern) { in getMaddPatterns()
5250 unsigned BitSize, OrrOpc, ZeroReg; in genAlternativeCodeSequence() local
5294 unsigned SubOpc, ZeroReg; in genAlternativeCodeSequence() local
5342 unsigned BitSize, OrrOpc, ZeroReg; in genAlternativeCodeSequence() local
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| H A D | AArch64ExpandPseudoInsts.cpp | 186 unsigned StlrOp, unsigned CmpOp, unsigned ExtendImm, unsigned ZeroReg, in expandCMP_SWAP()
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| H A D | AArch64FastISel.cpp | 380 unsigned ZeroReg = (VT == MVT::i64) ? AArch64::XZR : AArch64::WZR; in materializeInt() local
4845 unsigned ZeroReg = (VT == MVT::i64) ? AArch64::XZR : AArch64::WZR; in selectSDiv() local
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| H A D | AArch64ISelDAGToDAG.cpp | 2805 unsigned ZeroReg; in tryShiftAmountMod() local
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| H A D | AArch64ISelLowering.cpp | 14429 unsigned ZeroReg; in replaceZeroVectorStore() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 87 unsigned Opc = 0, ZeroReg = 0; in copyPhysReg() local
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| H A D | MipsAsmPrinter.cpp | 144 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO; in emitPseudoIndirectBranch() local
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| H A D | MipsSEISelDAGToDAG.cpp | 85 unsigned DstReg = 0, ZeroReg = 0; in replaceUsesWithZeroReg() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | InstructionSelectorImpl.h | 872 int64_t ZeroReg = MatchTable[CurrentIdx++]; in executeMatchTable() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 550 auto ZeroReg = MRI.createVirtualRegister(&ARM::GPRRegClass); in selectCmp() local
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| H A D | ARMFastISel.cpp | 1473 unsigned ZeroReg = fastMaterializeConstant(Zero); in SelectCmp() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2721 unsigned ZeroReg = IsAddress ? ABI.GetNullPtr() : ABI.GetZeroReg(); in loadImmediate() local
4189 unsigned ZeroReg; in expandDivRem() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2091 MCRegister ZeroReg; in onlyFoldImmediate() local
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| H A D | PPCISelLowering.cpp | 11191 unsigned ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; in EmitPartwordAtomicBinary() local
12238 Register ZeroReg = is64bit ? PPC::ZERO8 : PPC::ZERO; in EmitInstrWithCustomInserter() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2160 Register ZeroReg; in applyCombineUnmergeZExtToZExt() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4252 const Register ZeroReg = AArch64::WZR; in emitCSetForFCmp() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 7227 Register ZeroReg = MRI.createVirtualRegister(RI.getBoolRC()); in convertNonUniformLoopRegion() local
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