1 /* $NetBSD: pte.h,v 1.5 2019/04/16 12:25:17 skrll Exp $ */ 2 3 /* $OpenBSD: pte.h,v 1.11 2002/09/05 18:41:19 mickey Exp $ */ 4 5 /* 6 * Copyright (c) 1990,1993,1994 The University of Utah and 7 * the Computer Systems Laboratory at the University of Utah (CSL). 8 * All rights reserved. 9 * 10 * Permission to use, copy, modify and distribute this software is hereby 11 * granted provided that (1) source code retains these copyright, permission, 12 * and disclaimer notices, and (2) redistributions including binaries 13 * reproduce the notices in supporting documentation, and (3) all advertising 14 * materials mentioning features or use of this software display the following 15 * acknowledgement: ``This product includes software developed by the 16 * Computer Systems Laboratory at the University of Utah.'' 17 * 18 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS 19 * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF 20 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 21 * 22 * CSL requests users of this software to return to csl-dist@cs.utah.edu any 23 * improvements that they make and grant CSL redistribution rights. 24 * 25 * Utah $Hdr: pmap.h 1.24 94/12/14$ 26 * Author: Mike Hibler, Bob Wheeler, University of Utah CSL, 9/90 27 */ 28 29 #ifndef _HPPA_PTE_H_ 30 #define _HPPA_PTE_H_ 31 32 typedef uint32_t pt_entry_t; 33 34 #define PTE_PROT_SHIFT 19 35 #define PTE_PROT(tlb) ((tlb) >> PTE_PROT_SHIFT) 36 #define TLB_PROT(pte) ((pte) << PTE_PROT_SHIFT) 37 #define PDE_MASK (0xffc00000) 38 #define PDE_SIZE (0x00400000) 39 #define PTE_MASK (0x003ff000) 40 #define PTE_PAGE(pte) ((pte) & ~PGOFSET) 41 42 /* TLB access/protection values */ 43 /* 0x80000000 has no pt_entry_t equivalent */ 44 #define TLB_WIRED 0x40000000 /* software only */ 45 #define TLB_REFTRAP 0x20000000 /* bit 2, T */ 46 #define TLB_DIRTY 0x10000000 /* bit 3, D */ 47 #define TLB_BREAK 0x08000000 /* bit 4, B */ 48 #define TLB_AR_MASK 0x07f00000 /* bits 5-11, Access Rights */ 49 #define TLB_READ 0x00000000 50 #define TLB_WRITE 0x01000000 51 #define TLB_EXECUTE 0x02000000 52 #define TLB_GATEWAY 0x04000000 53 #define TLB_USER 0x00f00000 54 #define TLB_AR_NA 0x07300000 55 #define TLB_AR_R TLB_READ 56 #define TLB_AR_RW TLB_READ|TLB_WRITE 57 #define TLB_AR_RX TLB_READ|TLB_EXECUTE 58 #define TLB_AR_RWX TLB_READ|TLB_WRITE|TLB_EXECUTE 59 #define TLB_UNCACHEABLE 0x00080000 /* bit 12, U */ 60 /* bit 13-30, Access ID */ 61 #define TLB_PID_MASK 0x0000fffe 62 /* 0x00000001 has no pt_entry_t equivalent */ 63 64 #define TLB_BITS \ 65 "\177\020" /* New bitmask */ \ 66 "b\036wired\0" /* bit 30 (1) */ \ 67 "b\035T\0" /* bit 29 (2) */ \ 68 "b\034D\0" /* bit 28 (3) */ \ 69 "b\033B\0" /* bit 27 (4) */ \ 70 "b\023U\0" /* bit 19 (12) */ \ 71 "f\024\07ar\0" /* bit 20 (11) .. 26 (5) */ \ 72 "=\x73" "------\0" \ 73 "=\x00" "r-----\0" \ 74 "=\x10" "rw----\0" \ 75 "=\x20" "r-x---\0" \ 76 "=\x30" "rwx---\0" \ 77 "=\x0f" "r--r--\0" \ 78 "=\x1f" "rw-rw-\0" \ 79 "=\x2f" "r-xr-x\0" \ 80 "=\x3f" "rwxrwx\0" \ 81 "=\x4c" "gate\0" \ 82 "=\x2c" "break\0" \ 83 "f\001\017pid\0\0" /* bit 1 (30) .. 15 (16) */ 84 85 /* protection for a gateway page */ 86 #define TLB_GATE_PROT 0x04c00000 87 88 /* protection for break page */ 89 #define TLB_BREAK_PROT 0x02c00000 90 91 #endif /* _HPPA_PTE_H_ */ 92