Searched defs:ShiftImm (Results 1 – 12 of 12) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
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| H A D | MipsISelLowering.cpp | 1634 int64_t ShiftImm = 32 - (Size * 8); in emitSignExtendToI32InReg() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 255 int64_t ShiftImm; in matchBitfieldExtractFromSExtInReg() local
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| H A D | AArch64InstructionSelector.cpp | 1632 Optional<int64_t> ShiftImm = getVectorShiftImm(Reg, MRI); in getVectorSHLImm() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 1325 unsigned ShiftImm; in emitAddSub_ri() local
1365 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rs()
1407 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rx()
1558 uint64_t ShiftImm, bool WantResult) { in emitSubs_rs()
1688 uint64_t ShiftImm) { in emitLogicalOp_rs()
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| H A D | AArch64ISelDAGToDAG.cpp | 1871 uint64_t ShiftImm; in isBitfieldExtractOpFromSExtInReg() local
2008 uint64_t ShiftImm; in tryBitfieldExtractOpFromSExt() local
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| H A D | AArch64ISelLowering.cpp | 14665 unsigned ShiftImm = N->getConstantOperandVal(1); in performVectorShiftCombine() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 853 unsigned ShiftImm; // shift for OffsetReg. member
863 unsigned ShiftImm; member
875 unsigned ShiftImm; member
881 unsigned ShiftImm; member
3640 unsigned ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister()
3654 unsigned ShiftImm, SMLoc S, SMLoc E) { in CreateShiftedImmediate()
3804 ARM_AM::ShiftOpc ShiftType, unsigned ShiftImm, unsigned Alignment, in CreateMem()
3822 unsigned ShiftImm, SMLoc S, SMLoc E) { in CreatePostIdxReg()
5646 unsigned ShiftImm = 0; in parsePostIdxReg() local
5986 unsigned ShiftImm = 0; in parseMemory() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 666 unsigned ShiftImm = DefMI->getOperand(3).getImm(); in simplifyCode() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 2775 unsigned ShiftImm; in SelectShift() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 951 unsigned Size, ShiftImm; in getMVEShiftImmOpValue() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 5620 const APInt &ShiftImm = N2C->getAPIntValue(); in getNode() local
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