Searched defs:SExtInReg (Results 1 – 2 of 2) sorted by relevance
| /llvm-project/llvm/unittests/Support/ | ||
| H A D | KnownBitsTest.cpp | 743 TEST(KnownBitsTest,SExtInReg) TEST() argument |
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ | ||
| H A D | TargetLowering.cpp | 4146 SDValue SExtInReg = DAG.getNode( optimizeSetCCOfSignedTruncationCheck() local |