| /openbsd-src/gnu/llvm/llvm/utils/TableGen/ |
| H A D | CallingConvEmitter.cpp | 365 std::set<std::string> &Registers = Entry.second; in EmitArgRegisterLists() local
393 std::set<std::string> &Registers = Entry.second; in EmitArgRegisterLists() local
417 std::set<std::string> &Registers = Entry.second; in EmitArgRegisterLists() local
|
| H A D | AsmWriterEmitter.cpp | 555 const std::deque<CodeGenRegister> &Registers) { in emitRegisterNameString()
610 const auto &Registers = Target.getRegBank().getRegisters(); in EmitGetRegisterName() local
|
| H A D | CodeGenRegisters.h | 571 std::deque<CodeGenRegister> Registers; variable
|
| H A D | AsmMatcherEmitter.cpp | 204 RegisterSet Registers; member
1223 const auto &Registers = Target.getRegBank().getRegisters(); in buildRegisterClasses() local
|
| H A D | RegisterInfoEmitter.cpp | 104 const auto &Registers = Bank.getRegisters(); in runEnums() local
|
| H A D | CodeGenRegisters.cpp | 1655 const auto &Registers = RegBank.getRegisters(); in computeUberSets() local
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUPALMetadata.h | 27 msgpack::DocNode Registers; variable
|
| H A D | AMDGPUPALMetadata.cpp | 725 auto Registers = getRegisters(); in toLegacyBlob() local
|
| /openbsd-src/gnu/llvm/lldb/source/Plugins/Process/Windows/Common/ |
| H A D | ProcessWindowsLog.h | 23 Registers = Log::ChannelFlag<5>, // Log register operations enumerator
|
| /openbsd-src/gnu/llvm/lldb/source/Plugins/Process/POSIX/ |
| H A D | ProcessPOSIXLog.h | 23 Registers = Log::ChannelFlag<4>, enumerator
|
| /openbsd-src/gnu/llvm/llvm/docs/ |
| H A D | MIRLangRef.rst | 417 Registers section in Machine Instructions Format Reference
458 .. _machine-operands:
|
| H A D | NVPTXUsage.rst | 196 '``llvm.nvvm.read.ptx.sreg.*``'
|
| /openbsd-src/gnu/llvm/llvm/tools/llvm-exegesis/lib/ |
| H A D | RegisterAliasing.h | 101 Registers; member
|
| /openbsd-src/gnu/llvm/clang/utils/TableGen/ |
| H A D | MveEmitter.cpp | 315 unsigned Registers; member in __anonece5a09e0111::MultiVectorType
318 MultiVectorType(unsigned Registers, const VectorType *Element) in MultiVectorType()
1003 const MultiVectorType *getMultiVectorType(unsigned Registers, in getMultiVectorType()
1118 unsigned Registers = Op->getValueAsInt("n"); in getType() local
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 379 constexpr std::array<unsigned, 31> Registers = { in ConsecutiveRegisters() local
|
| /openbsd-src/gnu/llvm/libunwind/src/ |
| H A D | UnwindCursor.hpp | 990 template <typename Registers> bool setInfoForSigReturn(Registers &) { in setInfoForSigReturn() argument
993 template <typename Registers> int stepThroughSigReturn(Registers &) { in stepThroughSigReturn() argument
|
| /openbsd-src/gnu/llvm/lldb/source/Commands/ |
| H A D | CommandCompletions.cpp | 600 void CommandCompletions::Registers(CommandInterpreter &interpreter, in Registers() function in CommandCompletions
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 2149 std::array<std::pair<Register, int>, 4> Registers = { in insertWideShift() local
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 2959 static const MCPhysReg Registers[6][8] = { in fastLowerArguments() local
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 784 SmallVector<unsigned, 8> Registers; member in __anon3b5979970111::ARMOperand
4495 SmallVector<std::pair<unsigned, unsigned>, 16> Registers; in parseRegisterList() local
|