Searched defs:RegisterVT (Results 1 – 10 of 10) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyMachineFunctionInfo.cpp | 43 MVT RegisterVT = TLI.getRegisterType(F.getContext(), VT); in computeLegalValueVTs() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 73 MVT RegisterVT = TLI.getRegisterTypeForCallingConv( in handle() local
347 static CCValAssign::LocInfo determineLocInfo(const MVT RegisterVT, const EVT VT, in determineLocInfo()
648 MVT RegisterVT = TLI.getRegisterTypeForCallingConv(F.getContext(), in subTargetRegTypeForCallingConv() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FunctionLoweringInfo.cpp | 395 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT); in CreateRegs() local
|
| H A D | SelectionDAGBuilder.cpp | 340 MVT RegisterVT; in getCopyFromPartsVector() local
694 MVT RegisterVT; in getCopyToPartsVector() local
794 MVT RegisterVT = in RegsForValue() local
823 MVT RegisterVT = isABIMangled() ? TLI.getRegisterTypeForCallingConv( in getCopyFromRegs() local
906 MVT RegisterVT = isABIMangled() ? TLI.getRegisterTypeForCallingConv( in getCopyToRegs() local
992 MVT RegisterVT = RegVTs[Value]; in AddInlineAsmOperands() local
1007 MVT RegisterVT = std::get<1>(CountAndVT); in getRegsAndSizes() local
9368 MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT); in LowerCallTo() local
9433 MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(), in LowerCallTo() local
9719 MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(), in LowerCallTo() local
[all …]
|
| H A D | FastISel.cpp | 1014 MVT RegisterVT = TLI.getRegisterType(CLI.RetTy->getContext(), VT); in lowerCallTo() local
|
| H A D | SelectionDAG.cpp | 2161 MVT RegisterVT; in getReducedAlign() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1071 MVT &RegisterVT, in getVectorTypeBreakdownMVT()
1437 MVT RegisterVT; in computeRegisterProperties() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 977 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
1455 MVT RegisterVT; in getRegisterType() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1054 MVT RegisterVT = getRegisterTypeForCallingConv(Ctx, CC, ArgVT); in analyzeFormalArgumentsCompute() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2157 MVT RegisterVT; in getRegisterTypeForCallingConv() local
2175 MVT RegisterVT; in getNumRegistersForCallingConv() local
|