| /llvm-project/lldb/include/lldb/Target/ |
| H A D | DynamicRegisterInfo.h | 28 struct Register { struct 44 const RegisterFlags *flags_type = nullptr; argument 60 size_t SetRegisterInfo(std::vector<Register> &®s, argument
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| /llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfExpression.h | 47 struct Register { struct 53 static Register createRegister(int64_t RegNo, const char *Comment) { in createRegister() argument 58 static Register createSubRegister(int64_t RegNo, unsigned SizeInBits, in createSubRegister() argument 82 enum { Unknown = 0, Register, Memory, Implicit }; enumerator 63 isSubRegisterRegister isSubRegister() argument [all...] |
| /llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 435 unsigned Register = DecodeFPR128RegisterClass() local 463 unsigned Register = DecodeFPR64RegisterClass() local 475 unsigned Register = DecodeFPR32RegisterClass() local 487 unsigned Register = DecodeFPR16RegisterClass() local 499 unsigned Register = DecodeFPR8RegisterClass() local 511 unsigned Register = DecodeGPR64commonRegisterClass() local 524 unsigned Register = DecodeGPR64RegisterClass() local 538 unsigned Register = DecodeGPR64x8ClassRegisterClass() local 550 unsigned Register = DecodeGPR64spRegisterClass() local 562 unsigned Register = DecodeMatrixIndexGPR32_8_11RegisterClass() local 576 unsigned Register = DecodeMatrixIndexGPR32_12_15RegisterClass() local 589 unsigned Register = DecodeGPR32RegisterClass() local 601 unsigned Register = DecodeGPR32spRegisterClass() local 613 unsigned Register = DecodeZPRRegisterClass() local 640 unsigned Register = DecodeZPR2RegisterClass() local 651 unsigned Register = DecodeZPR3RegisterClass() local 662 unsigned Register = DecodeZPR4RegisterClass() local 673 unsigned Register = DecodeZPR2Mul2RegisterClass() local 684 unsigned Register = DecodeZPR4Mul4RegisterClass() local 695 unsigned Register = DecodeZPR2StridedRegisterClass() local 707 unsigned Register = DecodeZPR4StridedRegisterClass() local 753 unsigned Register = DecodePPRorPNRRegisterClass() local 765 unsigned Register = DecodePPRRegisterClass() local 777 unsigned Register = DecodePNRRegisterClass() local 809 unsigned Register = DecodePPR2RegisterClass() local 820 unsigned Register = DecodePPR2Mul2RegisterClass() local 831 unsigned Register = DecodeQQRegisterClass() local 842 unsigned Register = DecodeQQQRegisterClass() local 853 unsigned Register = DecodeQQQQRegisterClass() local 864 unsigned Register = DecodeDDRegisterClass() local 875 unsigned Register = DecodeDDDRegisterClass() local 886 unsigned Register = DecodeDDDDRegisterClass() local [all...] |
| /llvm-project/clang-tools-extra/test/clang-tidy/checkers/llvm/ |
| H A D | prefer-register-over-unsigned2.cpp | 4 class Register { class
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| H A D | prefer-register-over-unsigned3.cpp | 6 class Register { class
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| H A D | prefer-register-over-unsigned.cpp | 4 class Register { class
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| /llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 692 unsigned Register = CtrlRegDecoderTable[RegNo]; in DecodeCtrRegsRegisterClass() local 720 unsigned Register = CtrlReg64DecoderTable[RegNo]; in DecodeCtrRegs64RegisterClass() local 728 unsigned Register = 0; in DecodeModRegsRegisterClass() local 473 unsigned Register = getSingleInstruction() local 818 unsigned Register = SysRegDecoderTable[RegNo]; DecodeSysRegsRegisterClass() local 846 unsigned Register = SysReg64DecoderTable[RegNo]; DecodeSysRegs64RegisterClass() local 872 unsigned Register = GuestRegDecoderTable[RegNo]; DecodeGuestRegsRegisterClass() local 899 unsigned Register = GuestReg64DecoderTable[RegNo]; DecodeGuestRegs64RegisterClass() local [all...] |
| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineSSAContext.h | 25 class Register; variable
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| H A D | LiveRangeEdit.h | 56 virtual bool LRE_CanEraseVirtReg(Register) { return true; } in LRE_CanEraseVirtReg() argument 59 virtual void LRE_WillShrinkVirtReg(Register) {} in LRE_WillShrinkVirtReg() argument [all...] |
| H A D | Register.h | 24 constexpr Register(MCRegister Val) : Reg(Val.id()) {} in Register() function [all...] |
| H A D | DebugHandlerBase.h | 33 unsigned Register; member
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| /llvm-project/llvm/include/llvm/MC/ |
| H A D | MachineLocation.h | 25 unsigned Register = 0; ///< gcc/gdb register number. variable
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| H A D | DXContainerPSVInfo.h | 95 uint32_t Register; member 106 dxbc::SigComponentType CompType, uint32_t Register, in addParam()
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| /llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCChecker.cpp | 534 MCRegister Register = Operand.getReg(); in checkRegistersReadOnly() local 545 registerUsed(unsigned Register) registerUsed() argument 559 registerProducer(unsigned Register,HexagonMCInstrInfo::PredicateInfo ConsumerPredicate) registerProducer() argument 737 compoundRegisterMap(unsigned & Register) compoundRegisterMap() argument 768 reportErrorRegisters(unsigned Register) reportErrorRegisters() argument 773 reportErrorNewValue(unsigned Register) reportErrorNewValue() argument [all...] |
| H A D | HexagonMCInstrInfo.h | 337 PredicateInfo(MCRegister Register, unsigned Operand, bool PredicatedTrue) in PredicateInfo() argument 340 MCRegister Register; variable
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| /llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 179 unsigned Register = (Insn >> 18) & 0x1f; in decodeRiMemoryValue() local 192 unsigned Register = (Insn >> 15) & 0x1f; in decodeRrMemoryValue() local 205 unsigned Register = (Insn >> 12) & 0x1f; in decodeSplsValue() local
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| /llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | InlineAsmLowering.h | 24 class Register; variable
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 232 struct Register { struct 234 Register(llvm::Register R, unsigned S) : Reg(R), Sub(S) {} in Register() argument 235 Register(const MachineOperand &Op) in Register() argument 237 Register &operator=(const MachineOperand &Op) { in operator =() argument 261 bool operator==(Register in operator MachineOperand() argument 246 isVReg__anon2d0f1e950111::HexagonConstExtenders::Register isVReg() argument 249 isSlot__anon2d0f1e950111::HexagonConstExtenders::Register isSlot() argument 250 operator MachineOperand__anon2d0f1e950111::HexagonConstExtenders::Register operator MachineOperand() argument 262 operator !=__anon2d0f1e950111::HexagonConstExtenders::Register operator !=() argument 263 operator <__anon2d0f1e950111::HexagonConstExtenders::Register operator <() argument 267 Reg__anon2d0f1e950111::HexagonConstExtenders::Register global() argument 268 Sub__anon2d0f1e950111::HexagonConstExtenders::Register global() argument [all...] |
| /llvm-project/llvm/tools/llvm-exegesis/lib/ |
| H A D | RegisterValue.h | 28 unsigned Register; global() member
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| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PreLegalizerCombiner.cpp | 235 matchExtAddvToUdotAddv(MachineInstr & MI,MachineRegisterInfo & MRI,const AArch64Subtarget & STI,std::tuple<Register,Register,bool> & MatchInfo) matchExtAddvToUdotAddv() argument 237 matchExtAddvToUdotAddv(MachineInstr & MI,MachineRegisterInfo & MRI,const AArch64Subtarget & STI,std::tuple<Register,Register,bool> & MatchInfo) matchExtAddvToUdotAddv() argument 290 applyExtAddvToUdotAddv(MachineInstr & MI,MachineRegisterInfo & MRI,MachineIRBuilder & Builder,GISelChangeObserver & Observer,const AArch64Subtarget & STI,std::tuple<Register,Register,bool> & MatchInfo) applyExtAddvToUdotAddv() argument 294 applyExtAddvToUdotAddv(MachineInstr & MI,MachineRegisterInfo & MRI,MachineIRBuilder & Builder,GISelChangeObserver & Observer,const AArch64Subtarget & STI,std::tuple<Register,Register,bool> & MatchInfo) applyExtAddvToUdotAddv() argument 416 matchExtUaddvToUaddlv(MachineInstr & MI,MachineRegisterInfo & MRI,std::pair<Register,bool> & MatchInfo) matchExtUaddvToUaddlv() argument 449 applyExtUaddvToUaddlv(MachineInstr & MI,MachineRegisterInfo & MRI,MachineIRBuilder & B,GISelChangeObserver & Observer,std::pair<Register,bool> & MatchInfo) applyExtUaddvToUaddlv() argument [all...] |
| /llvm-project/llvm/lib/MC/ |
| H A D | MCAsmStreamer.cpp | 1952 EmitRegisterName(int64_t Register) EmitRegisterName() argument 1967 emitCFIDefCfa(int64_t Register,int64_t Offset,SMLoc Loc) emitCFIDefCfa() argument 1981 emitCFILLVMDefAspaceCfa(int64_t Register,int64_t Offset,int64_t AddressSpace,SMLoc Loc) emitCFILLVMDefAspaceCfa() argument 2017 emitCFIDefCfaRegister(int64_t Register,SMLoc Loc) emitCFIDefCfaRegister() argument 2024 emitCFIOffset(int64_t Register,int64_t Offset,SMLoc Loc) emitCFIOffset() argument 2059 emitCFIRestore(int64_t Register,SMLoc Loc) emitCFIRestore() argument 2066 emitCFISameValue(int64_t Register,SMLoc Loc) emitCFISameValue() argument 2073 emitCFIRelOffset(int64_t Register,int64_t Offset,SMLoc Loc) emitCFIRelOffset() argument 2094 emitCFIUndefined(int64_t Register,SMLoc Loc) emitCFIUndefined() argument 2123 emitCFIReturnColumn(int64_t Register) emitCFIReturnColumn() argument 2223 emitWinCFIPushReg(MCRegister Register,SMLoc Loc) emitWinCFIPushReg() argument 2231 emitWinCFISetFrame(MCRegister Register,unsigned Offset,SMLoc Loc) emitWinCFISetFrame() argument 2248 emitWinCFISaveReg(MCRegister Register,unsigned Offset,SMLoc Loc) emitWinCFISaveReg() argument 2258 emitWinCFISaveXMM(MCRegister Register,unsigned Offset,SMLoc Loc) emitWinCFISaveXMM() argument [all...] |
| H A D | MCStreamer.cpp | 540 MCCFIInstruction::createDefCfaRegister(Label, Register, Loc); in emitCFIOffset() argument 486 emitCFIDefCfa(int64_t Register,int64_t Offset,SMLoc Loc) emitCFIDefCfa() argument 517 emitCFIDefCfaRegister(int64_t Register,SMLoc Loc) emitCFIDefCfaRegister() argument 528 emitCFILLVMDefAspaceCfa(int64_t Register,int64_t Offset,int64_t AddressSpace,SMLoc Loc) emitCFILLVMDefAspaceCfa() argument 550 emitCFIRelOffset(int64_t Register,int64_t Offset,SMLoc Loc) emitCFIRelOffset() argument 598 emitCFISameValue(int64_t Register,SMLoc Loc) emitCFISameValue() argument 608 emitCFIRestore(int64_t Register,SMLoc Loc) emitCFIRestore() argument 645 emitCFIUndefined(int64_t Register,SMLoc Loc) emitCFIUndefined() argument 685 emitCFIReturnColumn(int64_t Register) emitCFIReturnColumn() argument 869 emitWinCFIPushReg(MCRegister Register,SMLoc Loc) emitWinCFIPushReg() argument 881 emitWinCFISetFrame(MCRegister Register,unsigned Offset,SMLoc Loc) emitWinCFISetFrame() argument 920 emitWinCFISaveReg(MCRegister Register,unsigned Offset,SMLoc Loc) emitWinCFISaveReg() argument 937 emitWinCFISaveXMM(MCRegister Register,unsigned Offset,SMLoc Loc) emitWinCFISaveXMM() argument [all...] |
| /llvm-project/clang/test/Modules/ |
| H A D | pr64091.cpp | 169 static bool Register(const ErrorSpace* (*space)()) { return true; } in Register() function in util::ErrorSpace
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| /llvm-project/compiler-rt/lib/sanitizer_common/ |
| H A D | sanitizer_allocator_stats.h | 59 void Register(AllocatorStats *s) { in Register() function
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | TailDuplicator.cpp | 359 processPHI(MachineInstr * MI,MachineBasicBlock * TailBB,MachineBasicBlock * PredBB,DenseMap<Register,RegSubRegPair> & LocalVRMap,SmallVectorImpl<std::pair<Register,RegSubRegPair>> & Copies,const DenseSet<Register> & RegsUsedByPhi,bool Remove) processPHI() argument 360 processPHI(MachineInstr * MI,MachineBasicBlock * TailBB,MachineBasicBlock * PredBB,DenseMap<Register,RegSubRegPair> & LocalVRMap,SmallVectorImpl<std::pair<Register,RegSubRegPair>> & Copies,const DenseSet<Register> & RegsUsedByPhi,bool Remove) processPHI() argument 393 duplicateInstruction(MachineInstr * MI,MachineBasicBlock * TailBB,MachineBasicBlock * PredBB,DenseMap<Register,RegSubRegPair> & LocalVRMap,const DenseSet<Register> & UsedByPhi) duplicateInstruction() argument 1055 appendCopies(MachineBasicBlock * MBB,SmallVectorImpl<std::pair<Register,RegSubRegPair>> & CopyInfos,SmallVectorImpl<MachineInstr * > & Copies) appendCopies() argument [all...] |