1 /* $NetBSD: rf3000reg.h,v 1.6 2009/10/19 23:19:39 rmind Exp $ */ 2 3 /* 4 * Copyright (c) 2005 David Young. All rights reserved. 5 * 6 * This code was written by David Young. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 18 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 20 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 21 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 23 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 28 * OF SUCH DAMAGE. 29 */ 30 31 #ifndef _DEV_IC_RF3000REG_H_ 32 #define _DEV_IC_RF3000REG_H_ 33 34 /* 35 * Serial bus format for RF Microdevices RF3000 spread-spectrum 36 * baseband modem. 37 */ 38 #define RF3000_TWI_DATA_MASK 0xff 39 #define RF3000_TWI_ADDR_MASK 0x7f 40 #define RF3000_TWI_AI 0x80 /* auto-increment */ 41 42 /* 43 * Registers for RFMD RF3000. 44 */ 45 #define RF3000_CTL 0x01 /* modem control */ 46 #define RF3000_CTL_MODE_MASK __BITS(7, 4) 47 #define RF3000_CTL_MODE_1MBPS 0 48 #define RF3000_CTL_MODE_RSVD0 1 49 #define RF3000_CTL_MODE_2MBPS 2 50 #define RF3000_CTL_MODE_2MBPS_SHORT 3 51 #define RF3000_CTL_MODE_5MBPS 4 52 #define RF3000_CTL_MODE_5MBPS_SHORT 5 53 #define RF3000_CTL_MODE_11MBPS 6 54 #define RF3000_CTL_MODE_11MBPS_SHORT 7 55 #define RF3000_CTL_MODE_BPSK 8 56 #define RF3000_CTL_MODE_QPSK 9 57 #define RF3000_CTL_MODE_RSVD1 10 58 #define RF3000_CTL_MODE_RSVD2 11 59 #define RF3000_RXSTAT RF3000_CTL /* RX status */ 60 #define RF3000_RXSTAT_SHORTPRE __BIT(3)/* 1: short preamble */ 61 #define RF3000_RXSTAT_ACQ __BIT(2)/* 1: acquired */ 62 #define RF3000_RXSTAT_SFD __BIT(1)/* 1: SFD detected */ 63 #define RF3000_RXSTAT_CRC __BIT(0)/* 1: CRC invalid */ 64 #define RF3000_CCACTL 0x02 /* CCA control */ 65 /* CCA mode */ 66 #define RF3000_CCACTL_MODE_MASK __BITS(7, 6) 67 #define RF3000_CCACTL_MODE_RSSIT 0 /* RSSI threshold */ 68 #define RF3000_CCACTL_MODE_ACQ 1 /* acquisition */ 69 #define RF3000_CCACTL_MODE_BOTH 2 /* threshold or acq. */ 70 /* RSSI threshold for CCA */ 71 #define RF3000_CCACTL_RSSIT_MASK __BITS(5, 0) 72 #define RF3000_DIVCTL 0x03 /* diversity control */ 73 #define RF3000_DIVCTL_ENABLE __BIT(7)/* enable diversity */ 74 #define RF3000_DIVCTL_ANTSEL __BIT(6)/* if ENABLE = 0, set 75 * ANT SEL 76 */ 77 #define RF3000_RSSI RF3000_DIVCTL /* RSSI value */ 78 #define RF3000_RSSI_MASK __BITS(5, 0) 79 #define RF3000_GAINCTL 0x11 /* TX variable gain control */ 80 #define RF3000_GAINCTL_TXVGC_MASK __BITS(7, 2) 81 #define RF3000_GAINCTL_SCRAMBLER __BIT(1) 82 #define RF3000_LOGAINCAL 0x14 /* low gain calibration */ 83 #define RF3000_LOGAINCAL_CAL_MASK __BITS(5, 0) 84 #define RF3000_HIGAINCAL 0x15 /* high gain calibration */ 85 #define RF3000_HIGAINCAL_CAL_MASK __BITS(5, 0) 86 #define RF3000_HIGAINCAL_DSSSPAD __BIT(6)/* 6dB gain pad for DSSS 87 * modes (meaning?) 88 */ 89 #define RF3000_OPTIONS1 0x1C /* Options Register 1 */ 90 /* Saturation threshold is 4 + offset, where -3 <= offset <= 3. 91 * SAT_THRESH is the absolute value, SAT_THRESH_SIGN is the sign. 92 */ 93 #define RF3000_OPTIONS1_SAT_THRESH_SIGN __BIT(7) 94 #define RF3000_OPTIONS1_SAT_THRESH __BITS(6,5) 95 #define RF3000_OPTIONS1_ALTAGC __BIT(4)/* 1: retrigger AGC 96 * algorithm on ADC 97 * saturation 98 */ 99 #define RF3000_OPTIONS1_ALTBUS __BIT(3)/* 1: enable alternate 100 * Tx/Rx data bus 101 * interface. 102 */ 103 #define RF3000_OPTIONS1_RESERVED0_MASK __BITS(2,0)/* 0 */ 104 105 #define RF3000_OPTIONS2 0x1D /* Options Register 2 */ 106 /* 1: delay next AGC 2us instead of 1us after a 1->0 LNAGS-pin transition. */ 107 #define RF3000_OPTIONS2_LNAGS_DELAY __BIT(7) 108 #define RF3000_OPTIONS2_RESERVED0_MASK __BITS(6,3) /* 0 */ 109 /* Threshold for AGC re-trigger. 0: high count, 1: low count. */ 110 #define RF3000_OPTIONS2_RTG_THRESH __BIT(2) 111 #define RF3000_OPTIONS2_RESERVED1_MASK __BITS(1,0) /* 0 */ 112 113 #endif /* _DEV_IC_RF3000REG_H_ */ 114