Home
last modified time | relevance | path

Searched defs:Pg (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/regress/sys/uvm/pdsim/
H A Dnbsd.hs40 data Page = Pg { pgid :: PageId, referenced :: Bool } constructor
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp371 IntrinsicInst *Pg = dyn_cast<IntrinsicInst>(II.getArgOperand(1)); in instCombineSVEDup() local
395 Value *Pg = II.getArgOperand(0); in instCombineSVELast() local
H A DAArch64ISelLowering.cpp13788 static SDValue getPTest(SelectionDAG &DAG, EVT VT, SDValue Pg, SDValue Op, in getPTest()
13901 SDValue Pg = N->getOperand(1); in convertMergedOpToPredOp() local
14617 SDValue Pg = N->getOperand(1); in performGLD1Combine() local
17391 auto Pg = getPredicateForFixedLengthVector(DAG, DL, InVT); in convertFixedMaskToScalableVector() local
17650 auto Pg = getPredicateForVector(DAG, DL, VT); in LowerToPredicatedOp() local
17743 SDValue Pg = getPredicateForVector(DAG, DL, SrcVT); in LowerVECREDUCE_SEQ_FADD() local
17767 SDValue Pg = getPredicateForVector(DAG, DL, OpVT); in LowerPredReductionToSVE() local
17809 SDValue Pg = getPredicateForVector(DAG, DL, SrcVT); in LowerReductionToSVE() local
17859 auto Pg = getPredicateForFixedLengthVector(DAG, DL, InVT); in LowerFixedLengthVectorSetccToSVE() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp143 unsigned Pg; member in __anon65f0dadd0111::AArch64AsmParser::PrefixInfo