xref: /netbsd-src/sys/arch/sun2/include/pte.h (revision befa8bb5df95f74d034920296abdb2526dfb59fa)
1 /*	$NetBSD: pte.h,v 1.8 2009/01/12 06:53:39 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #ifndef	_MACHINE_PTE_H
30 #define	_MACHINE_PTE_H
31 
32 #define NCONTEXT 8
33 #define NPMEG	256
34 #define SEGINV	(NPMEG-1)
35 #define NPAGSEG 16
36 #define NSEGMAP 512
37 
38 /*
39  * In our zeal to use the sun3 pmap with as few changes as possible,
40  * we pretend that sun2 page table entries work more like their sun3
41  * counterparts.  Namely, we pretend that they simply have PG_WRITE
42  * and PG_SYSTEM bits, and we use get_pte and set_pte to translate
43  * entries between the two styles.
44  *
45  * All known valid protections in a real sun2 PTE are given in
46  * (disabled) defines below, and are displayed as bitmaps here:
47  *
48  * 3 2 2 2 2
49  * 0 9 8 7 6   meaning
50  * -------------------
51  * 1 1 1 0 0   PG_KW => a read/write kernel-only page.
52  * 1 0 1 0 0   PG_KR => a read-only kernel-only page.
53  * 1 1 1 1 1   PG_UW => a read/write kernel/user page.
54  * 1 0 1 1 0   PG_URKR => a read-only kernel/user page.
55  *
56  * The sun3 PTE protections we want to emulate are:
57  *
58  * PG_SYSTEM | PG_WRITE => a read/write kernel-only page.
59  * PG_SYSTEM            => a read-only kernel-only page.
60  *             PG_WRITE => a read/write kernel/user page.
61  *                      => a read-only kernel/user page.
62  *
63  * We want to assign values to PG_SYSTEM and PG_WRITE, and
64  * craft get_pte and set_pte to do a translation from and to the real
65  * hardware protections.
66  *
67  * We begin by noting that bits 30 and 28 are set in all known valid
68  * sun2 protections.  Since we assume that the kernel can always read
69  * all pages in the system, we might as well call one of them the
70  * "kernel readable" bit, and say that the other is just always on.
71  * We deem bit 30 the "kernel readable" bit.  There is some evidence
72  * that bit 28 may mean "not a device" (the PROM makes PTEs for its
73  * device mappings with bit 28 clear), but I'm not sure enough about
74  * this to do anything about it.  So, set_pte will always set these
75  * bits when it loads a valid PTE, and get_pte will always clear them
76  * when it unloads a valid PTE.
77  *
78  * Bit 25, which SunOS calles the "fill on demand" bit, also needs
79  * to be set on all valid PTEs.  Dunno any more about this bit.
80  *
81  * Next, we see that bit 27 is set for all pages the user can access,
82  * and clear otherwise.  This bit has the opposite meaning of the sun3
83  * PG_SYSTEM bit, but that's OK - we will just define PG_SYSTEM to be
84  * bit 27, and set_pte and get_pte will invert it when loading or
85  * unloading a valid PTE.
86  *
87  * Bit 29 is set for all pages the kernel can write to.  We define
88  * PG_WRITE to be bit 29.  No inverting is done.
89  *
90  * That leaves us to take care of bit 26.  This bit, and bit 27, need
91  * to be set for all pages the user can write to.  On the sun3, all
92  * user-accessible pages that the kernel can write to, the user can
93  * also write to.  We can use this fact to make set_pte set bit 26 iff
94  * the kernel can write to the page (PG_WRITE is set), and the user
95  * can also access the page (bit 27 is set, i.e., PG_SYSTEM was clear
96  * before set_pte inverted it).
97  *
98  * This is what makes set_pte tricky.  It begins by clearing bit 26
99  * (this is paranoia, if all is working well, this bit should never be
100  * set in our pseudo-sun3 PTEs).  It then flips PG_SYSTEM to become
101  * the user-accessible bit.  Lastly, as the tricky part, it sets bits
102  * 30 and 28, *and* sets bit 26 by shifting the expression (pte &
103  * PG_WRITE) right by two to move the resulting "single bit" into the
104  * bit 27 position, ANDing that with bit 27 in the PTE (the
105  * user-accessible bit), shifting that right once more to line up with
106  * the target bit 26 in the PTE, and ORing it in.  This will result in
107  * bit 26 being set if the pseudo-sun3 protection was simply PG_WRITE.
108  *
109  * This could be expressed with if .. else.. logic, but the bit
110  * shifts should compile into something that needs no branching.
111  *
112  * get_pte's job is easier.  All it has to do is clear the always-set
113  * bits 30, 28, and 25, *and* clear bit 26, and flip PG_SYSTEM.  It can
114  * clear bit 26 because the value that was there can always be derived
115  * from the resulting pseudo-sun3 PG_SYSTEM and PG_WRITE combination.
116  *
117  * And that's how we reuse the sun3 pmap.
118  */
119 #define PG_VALID   0x80000000
120 #define PG_WRITE   0x20000000
121 #define PG_NC      0x00000000
122 #define PG_SYSTEM  0x08000000
123 #if 0
124 #define PG_KW      0x70000000
125 #define PG_KR      0x50000000
126 #define PG_UW      0x7C000000
127 #define PG_URKR    0x58000000
128 #endif
129 #define PG_TYPE    0x00C00000
130 #define PG_REF     0x00200000
131 #define PG_MOD     0x00100000
132 
133 #define PG_SPECIAL (PG_VALID|PG_WRITE|PG_SYSTEM|PG_NC|PG_REF|PG_MOD)
134 #define PG_PERM    (PG_VALID|PG_WRITE|PG_SYSTEM|PG_NC)
135 #define	PG_MODREF  (PG_REF|PG_MOD)
136 #define PG_FRAME   0x00000FFF
137 
138 #define PG_MOD_SHIFT 20
139 
140 /*
141  * At first glance, the need for two page types for the VME
142  * bus on the sun2 isn't obvious - it's a single 16 bit wide
143  * bus with 24 address lines, with the A16 devices simply
144  * found starting at addresses 0xff0000.  No problem - use
145  * only one page type.  But the sun2 VM page frame is only 12
146  * bits wide, with 11 bit wide page offsets, meaning only 23
147  * address bits, not enough to cover the entire VME bus.  So
148  * we have two page types, with the low bit of the page type
149  * representing the 24th VME bus address bit.
150  */
151 #define OBMEM	0
152 #define OBIO 	1
153 #define MBMEM	2	/* on the 2/120 */
154 #define VME0	2	/* on the 2/50 (VME addresses [0..0x7fffff]) */
155 #define MBIO	3	/* on the 2/120 */
156 #define VME8	3	/* on the 2/50 (VME addresses [0x800000..0xffffff]) */
157 #define PG_TYPE_SHIFT 22
158 
159 #define PG_INVAL   0x0
160 
161 #define MAKE_PGTYPE(x) ((x) << PG_TYPE_SHIFT)
162 #define PG_PFNUM(pte) (pte & PG_FRAME)
163 #define PG_PA(pte) (PG_PFNUM(pte) << PGSHIFT)
164 
165 #define	PGT_MASK	MAKE_PGTYPE(3)
166 #define	PGT_OBMEM	MAKE_PGTYPE(OBMEM)		/* onboard memory */
167 #define	PGT_OBIO	MAKE_PGTYPE(OBIO)		/* onboard I/O */
168 #define	PGT_MBMEM	MAKE_PGTYPE(MBMEM)	/* on the 2/120 */
169 #define	PGT_VME0	MAKE_PGTYPE(VME0)	/* on the 2/50 */
170 #define	PGT_MBIO	MAKE_PGTYPE(MBIO)	/* on the 2/120 */
171 #define	PGT_VME8	MAKE_PGTYPE(VME8)	/* on the 2/50 */
172 
173 #define VA_SEGNUM(x)	((u_int)(x) >> SEGSHIFT)
174 
175 #define VA_PTE_NUM_SHIFT  PGSHIFT
176 #define VA_PTE_NUM_MASK   (((1 << SEGSHIFT) - 1) ^ ((1 << PGSHIFT) - 1))
177 #define VA_PTE_NUM(va) (((va) & VA_PTE_NUM_MASK) >> VA_PTE_NUM_SHIFT)
178 
179 #define PA_PGNUM(pa) ((unsigned)(pa) >> PGSHIFT)
180 
181 #if defined(_KERNEL) || defined(_STANDALONE)
182 #define kernel_context() get_context(); set_context(0)
183 #define restore_context set_context
184 u_int get_pte(vaddr_t);
185 void  set_pte(vaddr_t, u_int);
186 #endif	/* _KERNEL */
187 
188 #endif	/* _MACHINE_PTE_H */
189