xref: /llvm-project/llvm/include/llvm/CodeGen/RegisterPressure.h (revision 9e6494c0fb29dfb5d4d2b7bf3ed7af261efee034)
1 //===- RegisterPressure.h - Dynamic Register Pressure -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the RegisterPressure class which can be used to track
10 // MachineInstr level register pressure.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_REGISTERPRESSURE_H
15 #define LLVM_CODEGEN_REGISTERPRESSURE_H
16 
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/ADT/SparseSet.h"
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/CodeGen/SlotIndexes.h"
22 #include "llvm/CodeGen/TargetRegisterInfo.h"
23 #include "llvm/MC/LaneBitmask.h"
24 #include <cassert>
25 #include <cstdint>
26 #include <cstdlib>
27 #include <limits>
28 #include <vector>
29 
30 namespace llvm {
31 
32 class LiveIntervals;
33 class MachineFunction;
34 class MachineInstr;
35 class MachineRegisterInfo;
36 class RegisterClassInfo;
37 
38 struct VRegMaskOrUnit {
39   Register RegUnit; ///< Virtual register or register unit.
40   LaneBitmask LaneMask;
41 
42   VRegMaskOrUnit(Register RegUnit, LaneBitmask LaneMask)
43       : RegUnit(RegUnit), LaneMask(LaneMask) {}
44 };
45 
46 /// Base class for register pressure results.
47 struct RegisterPressure {
48   /// Map of max reg pressure indexed by pressure set ID, not class ID.
49   std::vector<unsigned> MaxSetPressure;
50 
51   /// List of live in virtual registers or physical register units.
52   SmallVector<VRegMaskOrUnit, 8> LiveInRegs;
53   SmallVector<VRegMaskOrUnit, 8> LiveOutRegs;
54 
55   void dump(const TargetRegisterInfo *TRI) const;
56 };
57 
58 /// RegisterPressure computed within a region of instructions delimited by
59 /// TopIdx and BottomIdx.  During pressure computation, the maximum pressure per
60 /// register pressure set is increased. Once pressure within a region is fully
61 /// computed, the live-in and live-out sets are recorded.
62 ///
63 /// This is preferable to RegionPressure when LiveIntervals are available,
64 /// because delimiting regions by SlotIndex is more robust and convenient than
65 /// holding block iterators. The block contents can change without invalidating
66 /// the pressure result.
67 struct IntervalPressure : RegisterPressure {
68   /// Record the boundary of the region being tracked.
69   SlotIndex TopIdx;
70   SlotIndex BottomIdx;
71 
72   void reset();
73 
74   void openTop(SlotIndex NextTop);
75 
76   void openBottom(SlotIndex PrevBottom);
77 };
78 
79 /// RegisterPressure computed within a region of instructions delimited by
80 /// TopPos and BottomPos. This is a less precise version of IntervalPressure for
81 /// use when LiveIntervals are unavailable.
82 struct RegionPressure : RegisterPressure {
83   /// Record the boundary of the region being tracked.
84   MachineBasicBlock::const_iterator TopPos;
85   MachineBasicBlock::const_iterator BottomPos;
86 
87   void reset();
88 
89   void openTop(MachineBasicBlock::const_iterator PrevTop);
90 
91   void openBottom(MachineBasicBlock::const_iterator PrevBottom);
92 };
93 
94 /// Capture a change in pressure for a single pressure set. UnitInc may be
95 /// expressed in terms of upward or downward pressure depending on the client
96 /// and will be dynamically adjusted for current liveness.
97 ///
98 /// Pressure increments are tiny, typically 1-2 units, and this is only for
99 /// heuristics, so we don't check UnitInc overflow. Instead, we may have a
100 /// higher level assert that pressure is consistent within a region. We also
101 /// effectively ignore dead defs which don't affect heuristics much.
102 class PressureChange {
103   uint16_t PSetID = 0; // ID+1. 0=Invalid.
104   int16_t UnitInc = 0;
105 
106 public:
107   PressureChange() = default;
108   PressureChange(unsigned id): PSetID(id + 1) {
109     assert(id < std::numeric_limits<uint16_t>::max() && "PSetID overflow.");
110   }
111 
112   bool isValid() const { return PSetID > 0; }
113 
114   unsigned getPSet() const {
115     assert(isValid() && "invalid PressureChange");
116     return PSetID - 1;
117   }
118 
119   // If PSetID is invalid, return UINT16_MAX to give it lowest priority.
120   unsigned getPSetOrMax() const {
121     return (PSetID - 1) & std::numeric_limits<uint16_t>::max();
122   }
123 
124   int getUnitInc() const { return UnitInc; }
125 
126   void setUnitInc(int Inc) { UnitInc = Inc; }
127 
128   bool operator==(const PressureChange &RHS) const {
129     return PSetID == RHS.PSetID && UnitInc == RHS.UnitInc;
130   }
131 
132   void dump() const;
133 };
134 
135 /// List of PressureChanges in order of increasing, unique PSetID.
136 ///
137 /// Use a small fixed number, because we can fit more PressureChanges in an
138 /// empty SmallVector than ever need to be tracked per register class. If more
139 /// PSets are affected, then we only track the most constrained.
140 class PressureDiff {
141   // The initial design was for MaxPSets=4, but that requires PSet partitions,
142   // which are not yet implemented. (PSet partitions are equivalent PSets given
143   // the register classes actually in use within the scheduling region.)
144   enum { MaxPSets = 16 };
145 
146   PressureChange PressureChanges[MaxPSets];
147 
148   using iterator = PressureChange *;
149 
150   iterator nonconst_begin() { return &PressureChanges[0]; }
151   iterator nonconst_end() { return &PressureChanges[MaxPSets]; }
152 
153 public:
154   using const_iterator = const PressureChange *;
155 
156   const_iterator begin() const { return &PressureChanges[0]; }
157   const_iterator end() const { return &PressureChanges[MaxPSets]; }
158 
159   void addPressureChange(Register RegUnit, bool IsDec,
160                          const MachineRegisterInfo *MRI);
161 
162   void dump(const TargetRegisterInfo &TRI) const;
163 };
164 
165 /// List of registers defined and used by a machine instruction.
166 class RegisterOperands {
167 public:
168   /// List of virtual registers and register units read by the instruction.
169   SmallVector<VRegMaskOrUnit, 8> Uses;
170   /// List of virtual registers and register units defined by the
171   /// instruction which are not dead.
172   SmallVector<VRegMaskOrUnit, 8> Defs;
173   /// List of virtual registers and register units defined by the
174   /// instruction but dead.
175   SmallVector<VRegMaskOrUnit, 8> DeadDefs;
176 
177   /// Analyze the given instruction \p MI and fill in the Uses, Defs and
178   /// DeadDefs list based on the MachineOperand flags.
179   void collect(const MachineInstr &MI, const TargetRegisterInfo &TRI,
180                const MachineRegisterInfo &MRI, bool TrackLaneMasks,
181                bool IgnoreDead);
182 
183   /// Use liveness information to find dead defs not marked with a dead flag
184   /// and move them to the DeadDefs vector.
185   void detectDeadDefs(const MachineInstr &MI, const LiveIntervals &LIS);
186 
187   /// Use liveness information to find out which uses/defs are partially
188   /// undefined/dead and adjust the VRegMaskOrUnits accordingly.
189   /// If \p AddFlagsMI is given then missing read-undef and dead flags will be
190   /// added to the instruction.
191   void adjustLaneLiveness(const LiveIntervals &LIS,
192                           const MachineRegisterInfo &MRI, SlotIndex Pos,
193                           MachineInstr *AddFlagsMI = nullptr);
194 };
195 
196 /// Array of PressureDiffs.
197 class PressureDiffs {
198   PressureDiff *PDiffArray = nullptr;
199   unsigned Size = 0;
200   unsigned Max = 0;
201 
202 public:
203   PressureDiffs() = default;
204   PressureDiffs &operator=(const PressureDiffs &other) = delete;
205   PressureDiffs(const PressureDiffs &other) = delete;
206   ~PressureDiffs() { free(PDiffArray); }
207 
208   void clear() { Size = 0; }
209 
210   void init(unsigned N);
211 
212   PressureDiff &operator[](unsigned Idx) {
213     assert(Idx < Size && "PressureDiff index out of bounds");
214     return PDiffArray[Idx];
215   }
216   const PressureDiff &operator[](unsigned Idx) const {
217     return const_cast<PressureDiffs*>(this)->operator[](Idx);
218   }
219 
220   /// Record pressure difference induced by the given operand list to
221   /// node with index \p Idx.
222   void addInstruction(unsigned Idx, const RegisterOperands &RegOpers,
223                       const MachineRegisterInfo &MRI);
224 };
225 
226 /// Store the effects of a change in pressure on things that MI scheduler cares
227 /// about.
228 ///
229 /// Excess records the value of the largest difference in register units beyond
230 /// the target's pressure limits across the affected pressure sets, where
231 /// largest is defined as the absolute value of the difference. Negative
232 /// ExcessUnits indicates a reduction in pressure that had already exceeded the
233 /// target's limits.
234 ///
235 /// CriticalMax records the largest increase in the tracker's max pressure that
236 /// exceeds the critical limit for some pressure set determined by the client.
237 ///
238 /// CurrentMax records the largest increase in the tracker's max pressure that
239 /// exceeds the current limit for some pressure set determined by the client.
240 struct RegPressureDelta {
241   PressureChange Excess;
242   PressureChange CriticalMax;
243   PressureChange CurrentMax;
244 
245   RegPressureDelta() = default;
246 
247   bool operator==(const RegPressureDelta &RHS) const {
248     return Excess == RHS.Excess && CriticalMax == RHS.CriticalMax
249       && CurrentMax == RHS.CurrentMax;
250   }
251   bool operator!=(const RegPressureDelta &RHS) const {
252     return !operator==(RHS);
253   }
254   void dump() const;
255 };
256 
257 /// A set of live virtual registers and physical register units.
258 ///
259 /// This is a wrapper around a SparseSet which deals with mapping register unit
260 /// and virtual register indexes to an index usable by the sparse set.
261 class LiveRegSet {
262 private:
263   struct IndexMaskPair {
264     unsigned Index;
265     LaneBitmask LaneMask;
266 
267     IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
268         : Index(Index), LaneMask(LaneMask) {}
269 
270     unsigned getSparseSetIndex() const {
271       return Index;
272     }
273   };
274 
275   using RegSet = SparseSet<IndexMaskPair>;
276   RegSet Regs;
277   unsigned NumRegUnits = 0u;
278 
279   unsigned getSparseIndexFromReg(Register Reg) const {
280     if (Reg.isVirtual())
281       return Register::virtReg2Index(Reg) + NumRegUnits;
282     assert(Reg < NumRegUnits);
283     return Reg;
284   }
285 
286   Register getRegFromSparseIndex(unsigned SparseIndex) const {
287     if (SparseIndex >= NumRegUnits)
288       return Register::index2VirtReg(SparseIndex - NumRegUnits);
289     return Register(SparseIndex);
290   }
291 
292 public:
293   void clear();
294   void init(const MachineRegisterInfo &MRI);
295 
296   LaneBitmask contains(Register Reg) const {
297     unsigned SparseIndex = getSparseIndexFromReg(Reg);
298     RegSet::const_iterator I = Regs.find(SparseIndex);
299     if (I == Regs.end())
300       return LaneBitmask::getNone();
301     return I->LaneMask;
302   }
303 
304   /// Mark the \p Pair.LaneMask lanes of \p Pair.Reg as live.
305   /// Returns the previously live lanes of \p Pair.Reg.
306   LaneBitmask insert(VRegMaskOrUnit Pair) {
307     unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit);
308     auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask));
309     if (!InsertRes.second) {
310       LaneBitmask PrevMask = InsertRes.first->LaneMask;
311       InsertRes.first->LaneMask |= Pair.LaneMask;
312       return PrevMask;
313     }
314     return LaneBitmask::getNone();
315   }
316 
317   /// Clears the \p Pair.LaneMask lanes of \p Pair.Reg (mark them as dead).
318   /// Returns the previously live lanes of \p Pair.Reg.
319   LaneBitmask erase(VRegMaskOrUnit Pair) {
320     unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit);
321     RegSet::iterator I = Regs.find(SparseIndex);
322     if (I == Regs.end())
323       return LaneBitmask::getNone();
324     LaneBitmask PrevMask = I->LaneMask;
325     I->LaneMask &= ~Pair.LaneMask;
326     return PrevMask;
327   }
328 
329   size_t size() const {
330     return Regs.size();
331   }
332 
333   void appendTo(SmallVectorImpl<VRegMaskOrUnit> &To) const {
334     for (const IndexMaskPair &P : Regs) {
335       Register Reg = getRegFromSparseIndex(P.Index);
336       if (P.LaneMask.any())
337         To.emplace_back(Reg, P.LaneMask);
338     }
339   }
340 };
341 
342 /// Track the current register pressure at some position in the instruction
343 /// stream, and remember the high water mark within the region traversed. This
344 /// does not automatically consider live-through ranges. The client may
345 /// independently adjust for global liveness.
346 ///
347 /// Each RegPressureTracker only works within a MachineBasicBlock. Pressure can
348 /// be tracked across a larger region by storing a RegisterPressure result at
349 /// each block boundary and explicitly adjusting pressure to account for block
350 /// live-in and live-out register sets.
351 ///
352 /// RegPressureTracker holds a reference to a RegisterPressure result that it
353 /// computes incrementally. During downward tracking, P.BottomIdx or P.BottomPos
354 /// is invalid until it reaches the end of the block or closeRegion() is
355 /// explicitly called. Similarly, P.TopIdx is invalid during upward
356 /// tracking. Changing direction has the side effect of closing region, and
357 /// traversing past TopIdx or BottomIdx reopens it.
358 class RegPressureTracker {
359   const MachineFunction *MF = nullptr;
360   const TargetRegisterInfo *TRI = nullptr;
361   const RegisterClassInfo *RCI = nullptr;
362   const MachineRegisterInfo *MRI = nullptr;
363   const LiveIntervals *LIS = nullptr;
364 
365   /// We currently only allow pressure tracking within a block.
366   const MachineBasicBlock *MBB = nullptr;
367 
368   /// Track the max pressure within the region traversed so far.
369   RegisterPressure &P;
370 
371   /// Run in two modes dependending on whether constructed with IntervalPressure
372   /// or RegisterPressure. If requireIntervals is false, LIS are ignored.
373   bool RequireIntervals;
374 
375   /// True if UntiedDefs will be populated.
376   bool TrackUntiedDefs = false;
377 
378   /// True if lanemasks should be tracked.
379   bool TrackLaneMasks = false;
380 
381   /// Register pressure corresponds to liveness before this instruction
382   /// iterator. It may point to the end of the block or a DebugValue rather than
383   /// an instruction.
384   MachineBasicBlock::const_iterator CurrPos;
385 
386   /// Pressure map indexed by pressure set ID, not class ID.
387   std::vector<unsigned> CurrSetPressure;
388 
389   /// Set of live registers.
390   LiveRegSet LiveRegs;
391 
392   /// Set of vreg defs that start a live range.
393   SparseSet<Register, VirtReg2IndexFunctor> UntiedDefs;
394   /// Live-through pressure.
395   std::vector<unsigned> LiveThruPressure;
396 
397 public:
398   RegPressureTracker(IntervalPressure &rp) : P(rp), RequireIntervals(true) {}
399   RegPressureTracker(RegionPressure &rp) : P(rp), RequireIntervals(false) {}
400 
401   void reset();
402 
403   void init(const MachineFunction *mf, const RegisterClassInfo *rci,
404             const LiveIntervals *lis, const MachineBasicBlock *mbb,
405             MachineBasicBlock::const_iterator pos,
406             bool TrackLaneMasks, bool TrackUntiedDefs);
407 
408   /// Force liveness of virtual registers or physical register
409   /// units. Particularly useful to initialize the livein/out state of the
410   /// tracker before the first call to advance/recede.
411   void addLiveRegs(ArrayRef<VRegMaskOrUnit> Regs);
412 
413   /// Get the MI position corresponding to this register pressure.
414   MachineBasicBlock::const_iterator getPos() const { return CurrPos; }
415 
416   // Reset the MI position corresponding to the register pressure. This allows
417   // schedulers to move instructions above the RegPressureTracker's
418   // CurrPos. Since the pressure is computed before CurrPos, the iterator
419   // position changes while pressure does not.
420   void setPos(MachineBasicBlock::const_iterator Pos) { CurrPos = Pos; }
421 
422   /// Recede across the previous instruction.
423   void recede(SmallVectorImpl<VRegMaskOrUnit> *LiveUses = nullptr);
424 
425   /// Recede across the previous instruction.
426   /// This "low-level" variant assumes that recedeSkipDebugValues() was
427   /// called previously and takes precomputed RegisterOperands for the
428   /// instruction.
429   void recede(const RegisterOperands &RegOpers,
430               SmallVectorImpl<VRegMaskOrUnit> *LiveUses = nullptr);
431 
432   /// Recede until we find an instruction which is not a DebugValue.
433   void recedeSkipDebugValues();
434 
435   /// Advance across the current instruction.
436   void advance();
437 
438   /// Advance across the current instruction.
439   /// This is a "low-level" variant of advance() which takes precomputed
440   /// RegisterOperands of the instruction.
441   void advance(const RegisterOperands &RegOpers);
442 
443   /// Finalize the region boundaries and recored live ins and live outs.
444   void closeRegion();
445 
446   /// Initialize the LiveThru pressure set based on the untied defs found in
447   /// RPTracker.
448   void initLiveThru(const RegPressureTracker &RPTracker);
449 
450   /// Copy an existing live thru pressure result.
451   void initLiveThru(ArrayRef<unsigned> PressureSet) {
452     LiveThruPressure.assign(PressureSet.begin(), PressureSet.end());
453   }
454 
455   ArrayRef<unsigned> getLiveThru() const { return LiveThruPressure; }
456 
457   /// Get the resulting register pressure over the traversed region.
458   /// This result is complete if closeRegion() was explicitly invoked.
459   RegisterPressure &getPressure() { return P; }
460   const RegisterPressure &getPressure() const { return P; }
461 
462   /// Get the register set pressure at the current position, which may be less
463   /// than the pressure across the traversed region.
464   const std::vector<unsigned> &getRegSetPressureAtPos() const {
465     return CurrSetPressure;
466   }
467 
468   bool isTopClosed() const;
469   bool isBottomClosed() const;
470 
471   void closeTop();
472   void closeBottom();
473 
474   /// Consider the pressure increase caused by traversing this instruction
475   /// bottom-up. Find the pressure set with the most change beyond its pressure
476   /// limit based on the tracker's current pressure, and record the number of
477   /// excess register units of that pressure set introduced by this instruction.
478   void getMaxUpwardPressureDelta(const MachineInstr *MI,
479                                  PressureDiff *PDiff,
480                                  RegPressureDelta &Delta,
481                                  ArrayRef<PressureChange> CriticalPSets,
482                                  ArrayRef<unsigned> MaxPressureLimit);
483 
484   void getUpwardPressureDelta(const MachineInstr *MI,
485                               /*const*/ PressureDiff &PDiff,
486                               RegPressureDelta &Delta,
487                               ArrayRef<PressureChange> CriticalPSets,
488                               ArrayRef<unsigned> MaxPressureLimit) const;
489 
490   /// Consider the pressure increase caused by traversing this instruction
491   /// top-down. Find the pressure set with the most change beyond its pressure
492   /// limit based on the tracker's current pressure, and record the number of
493   /// excess register units of that pressure set introduced by this instruction.
494   void getMaxDownwardPressureDelta(const MachineInstr *MI,
495                                    RegPressureDelta &Delta,
496                                    ArrayRef<PressureChange> CriticalPSets,
497                                    ArrayRef<unsigned> MaxPressureLimit);
498 
499   /// Find the pressure set with the most change beyond its pressure limit after
500   /// traversing this instruction either upward or downward depending on the
501   /// closed end of the current region.
502   void getMaxPressureDelta(const MachineInstr *MI,
503                            RegPressureDelta &Delta,
504                            ArrayRef<PressureChange> CriticalPSets,
505                            ArrayRef<unsigned> MaxPressureLimit) {
506     if (isTopClosed())
507       return getMaxDownwardPressureDelta(MI, Delta, CriticalPSets,
508                                          MaxPressureLimit);
509 
510     assert(isBottomClosed() && "Uninitialized pressure tracker");
511     return getMaxUpwardPressureDelta(MI, nullptr, Delta, CriticalPSets,
512                                      MaxPressureLimit);
513   }
514 
515   /// Get the pressure of each PSet after traversing this instruction bottom-up.
516   void getUpwardPressure(const MachineInstr *MI,
517                          std::vector<unsigned> &PressureResult,
518                          std::vector<unsigned> &MaxPressureResult);
519 
520   /// Get the pressure of each PSet after traversing this instruction top-down.
521   void getDownwardPressure(const MachineInstr *MI,
522                            std::vector<unsigned> &PressureResult,
523                            std::vector<unsigned> &MaxPressureResult);
524 
525   void getPressureAfterInst(const MachineInstr *MI,
526                             std::vector<unsigned> &PressureResult,
527                             std::vector<unsigned> &MaxPressureResult) {
528     if (isTopClosed())
529       return getUpwardPressure(MI, PressureResult, MaxPressureResult);
530 
531     assert(isBottomClosed() && "Uninitialized pressure tracker");
532     return getDownwardPressure(MI, PressureResult, MaxPressureResult);
533   }
534 
535   bool hasUntiedDef(Register VirtReg) const {
536     return UntiedDefs.count(VirtReg);
537   }
538 
539   void dump() const;
540 
541   void increaseRegPressure(Register RegUnit, LaneBitmask PreviousMask,
542                            LaneBitmask NewMask);
543   void decreaseRegPressure(Register RegUnit, LaneBitmask PreviousMask,
544                            LaneBitmask NewMask);
545 
546 protected:
547   /// Add Reg to the live out set and increase max pressure.
548   void discoverLiveOut(VRegMaskOrUnit Pair);
549   /// Add Reg to the live in set and increase max pressure.
550   void discoverLiveIn(VRegMaskOrUnit Pair);
551 
552   /// Get the SlotIndex for the first nondebug instruction including or
553   /// after the current position.
554   SlotIndex getCurrSlot() const;
555 
556   void bumpDeadDefs(ArrayRef<VRegMaskOrUnit> DeadDefs);
557 
558   void bumpUpwardPressure(const MachineInstr *MI);
559   void bumpDownwardPressure(const MachineInstr *MI);
560 
561   void discoverLiveInOrOut(VRegMaskOrUnit Pair,
562                            SmallVectorImpl<VRegMaskOrUnit> &LiveInOrOut);
563 
564   LaneBitmask getLastUsedLanes(Register RegUnit, SlotIndex Pos) const;
565   LaneBitmask getLiveLanesAt(Register RegUnit, SlotIndex Pos) const;
566   LaneBitmask getLiveThroughAt(Register RegUnit, SlotIndex Pos) const;
567 };
568 
569 void dumpRegSetPressure(ArrayRef<unsigned> SetPressure,
570                         const TargetRegisterInfo *TRI);
571 
572 } // end namespace llvm
573 
574 #endif // LLVM_CODEGEN_REGISTERPRESSURE_H
575