| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 1742 Register OpReg = getRegForValue(TI->getOperand(0)); in X86SelectBranch() local
1777 Register OpReg = getRegForValue(BI->getCondition()); in X86SelectBranch() local
1799 unsigned CReg = 0, OpReg = 0; in X86SelectShift() local
2368 Register OpReg = getRegForValue(Opnd); in X86SelectSelect() local
2413 Register OpReg = getRegForValue(I->getOperand(0)); in X86SelectIntToFP() local
2467 Register OpReg = getRegForValue(I->getOperand(0)); in X86SelectFPExtOrFPTrunc() local
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| H A D | X86SpeculativeLoadHardening.cpp | 1661 Register OpReg = Op->getReg(); in hardenLoadAddr() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 298 Register OpReg = MI->getOperand(I).getReg(); in optimizeSDPattern() local
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| H A D | ARMInstructionSelector.cpp | 1043 Register OpReg = I.getOperand(2).getReg(); in select() local
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| H A D | ARMFastISel.cpp | 1260 unsigned OpReg = getRegForValue(TI->getOperand(0)); in SelectBranch() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86InstComments.cpp | 251 unsigned OpReg = MI->getOperand(OperandIndex).getReg(); in getRegOperandNumElts() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4541 unsigned OpReg = Inst.getOperand(2).getReg(); in expandSge() local
4678 unsigned OpReg = Inst.getOperand(2).getReg(); in expandSle() local
5369 unsigned OpReg = Inst.getOperand(2).getReg(); in expandSeq() local
5450 unsigned OpReg = Inst.getOperand(2).getReg(); in expandSne() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 838 Register OpReg = Op.getReg(); in executeInWaterfallLoop() local
3175 Register OpReg = MI.getOperand(I).getReg(); in getImageMapping() local
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| H A D | AMDGPUInstructionSelector.cpp | 2205 Register OpReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectG_FNEG() local
2242 Register OpReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectG_FABS() local
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| H A D | SIInstrInfo.cpp | 5088 Register OpReg = Op.getReg(); in legalizeGenericOperand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 1600 Register OpReg = getRegForValue(In); in selectFNeg() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 1951 Register OpReg = MO.getReg(); in clearRegisterKills() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3201 Register OpReg = MI.getOperand(1).getReg(); in lower() local
4897 Register OpReg = MI.getOperand(0).getReg(); in narrowScalarExtract() local
4966 Register OpReg = MI.getOperand(2).getReg(); in narrowScalarInsert() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 7462 unsigned OpReg = Inst.getOperand(i).getReg(); in checkLowRegisterList() local
7476 unsigned OpReg = Inst.getOperand(i).getReg(); in listContainsReg() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 5991 Register OpReg = MO.getReg(); in fixupPHIOpBanks() local
|