Searched defs:NumVecs (Results 1 – 9 of 9) sorted by relevance
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1486 void AArch64DAGToDAGISel::SelectTable(SDNode *N, unsigned NumVecs, unsigned Opc, in SelectTable() 1608 void AArch64DAGToDAGISel::SelectLoad(SDNode *N, unsigned NumVecs, unsigned Opc, in SelectLoad() 1637 void AArch64DAGToDAGISel::SelectPostLoad(SDNode *N, unsigned NumVecs, in SelectPostLoad() 1751 void AArch64DAGToDAGISel::SelectCVTIntrinsic(SDNode *N, unsigned NumVecs, in SelectCVTIntrinsic() 1767 void AArch64DAGToDAGISel::SelectPredicatedLoad(SDNode *N, unsigned NumVecs, in SelectPredicatedLoad() 1800 void AArch64DAGToDAGISel::SelectStore(SDNode *N, unsigned NumVecs, in SelectStore() 1820 void AArch64DAGToDAGISel::SelectPredicatedStore(SDNode *N, unsigned NumVecs, in SelectPredicatedStore() 1862 void AArch64DAGToDAGISel::SelectPostStore(SDNode *N, unsigned NumVecs, in SelectPostStore() 1918 void AArch64DAGToDAGISel::SelectLoadLane(SDNode *N, unsigned NumVecs, in SelectLoadLane() 1957 void AArch64DAGToDAGISel::SelectPostLoadLane(SDNode *N, unsigned NumVecs, in SelectPostLoadLane() [all …]
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H A D | AArch64TargetTransformInfo.cpp | 3148 unsigned NumVecs = (TpNumElts + LTNumElts - 1) / LTNumElts; in getShuffleCost() local
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H A D | AArch64ISelLowering.cpp | 19596 unsigned NumVecs = 0; in performNEONPostLDSTCombine() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 1940 unsigned NumVecs, bool is64BitVector) { in GetVLDSTAlign() 2105 static bool isPerfectIncrement(SDValue Inc, EVT VecTy, unsigned NumVecs) { in isPerfectIncrement() 2110 void ARMDAGToDAGISel::SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs, in SelectVLD() 2252 void ARMDAGToDAGISel::SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs, in SelectVST() 2407 unsigned NumVecs, in SelectVLDSTLane() 2790 void ARMDAGToDAGISel::SelectMVE_VLD(SDNode *N, unsigned NumVecs, in SelectMVE_VLD() 2953 bool isUpdating, unsigned NumVecs, in SelectVLDDup()
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H A D | ARMISelLowering.cpp | 15672 unsigned NumVecs = 0; in TryCombineBaseUpdate() local 16166 unsigned NumVecs = 0; in PerformMVEVLDCombine() local 16259 unsigned NumVecs = 0; in CombineVLDDUP() local
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/openbsd-src/gnu/llvm/llvm/lib/Analysis/ |
H A D | VectorUtils.cpp | 967 unsigned NumVecs) { in createInterleaveMask() 1042 unsigned NumVecs = Vecs.size(); in concatenateVectors() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 10640 int NumVecs = 2; in LowerINTRINSIC_WO_CHAIN() local 11061 unsigned NumVecs = VT.getSizeInBits() / 128; in LowerVectorLoad() local 11107 unsigned NumVecs = 2; in LowerVectorStore() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 5613 unsigned NumVecs, in selectVectorLoadIntrinsic()
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/openbsd-src/gnu/llvm/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 16489 unsigned NumVecs = 2; in EmitPPCBuiltinExpr() local
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