Searched defs:MidReg (Results 1 – 3 of 3) sorted by relevance
| /llvm-project/llvm/lib/Target/AArch64/GISel/ | ||
| H A D | AArch64PreLegalizerCombiner.cpp | 244 Register MidReg = I1->getOperand(0).getReg(); matchExtAddvToUdotAddv() local |
| H A D | AArch64LegalizerInfo.cpp | 1598 Register MidReg = legalizeIntrinsic() local |
| /llvm-project/llvm/lib/Target/AMDGPU/ | ||
| H A D | SIInstrInfo.cpp | 8126 Register MidReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); splitScalar64BitBCNT() local |