1 /* $NetBSD: rmixl_pcievar.h,v 1.3 2011/02/20 07:48:37 matt Exp $ */ 2 /*- 3 * Copyright (c) 2010 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Cliff Neighbors. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef _MIPS_RMI_PCIE_VAR_H_ 32 #define _MIPS_RMI_PCIE_VAR_H_ 33 34 #include <dev/pci/pcivar.h> 35 36 typedef enum rmixl_pcie_lnkcfg_mode { 37 LCFG_NO=0, /* placeholder */ 38 LCFG_EP, /* end point */ 39 LCFG_RC, /* root complex */ 40 } rmixl_pcie_lnkcfg_mode_t; 41 42 typedef struct rmixl_pcie_lnkcfg { 43 rmixl_pcie_lnkcfg_mode_t mode; 44 u_int lanes; 45 } rmixl_pcie_lnkcfg_t; 46 47 typedef struct rmixl_pcie_lnktab { 48 u_int ncfgs; 49 const char *str; 50 const rmixl_pcie_lnkcfg_t *cfg; 51 } rmixl_pcie_lnktab_t; 52 53 typedef struct rmixl_pcie_evcnt { 54 struct evcnt evcnt; 55 char name[32]; 56 } rmixl_pcie_evcnt_t; 57 58 typedef struct rmixl_pcie_link_dispatch { 59 int (*func)(void *); 60 void *arg; 61 u_int link; 62 u_int bitno; 63 u_int irq; 64 rmixl_pcie_evcnt_t *counts; /* index by cpu */ 65 } rmixl_pcie_link_dispatch_t; 66 67 struct rmixl_pcie_softc; 68 69 typedef struct rmixl_pcie_link_intr { 70 struct rmixl_pcie_softc *sc; 71 u_int link; 72 u_int ipl; 73 void *ih; /* mips interrupt handle */ 74 callout_t callout; /* for delayed free of this struct */ 75 u_int dispatch_count; 76 rmixl_pcie_link_dispatch_t dispatch_data[1]; 77 /* variable length */ 78 } rmixl_pcie_link_intr_t; 79 80 #define RMIXL_PCIE_NLINKS_MAX 4 81 82 typedef struct rmixl_pcie_softc { 83 device_t sc_dev; 84 struct mips_pci_chipset sc_pci_chipset; 85 bus_space_tag_t sc_pci_cfg_memt; 86 bus_space_tag_t sc_pci_ecfg_memt; 87 bus_dma_tag_t sc_29bit_dmat; 88 bus_dma_tag_t sc_32bit_dmat; 89 bus_dma_tag_t sc_64bit_dmat; 90 rmixl_pcie_lnktab_t sc_pcie_lnktab; 91 kmutex_t sc_mutex; 92 int sc_tmsk; 93 void *sc_fatal_ih; 94 rmixl_pcie_evcnt_t *sc_evcnts[RMIXL_PCIE_NLINKS_MAX]; 95 rmixl_pcie_link_intr_t *sc_link_intr[RMIXL_PCIE_NLINKS_MAX]; 96 } rmixl_pcie_softc_t; 97 98 99 extern void rmixl_physaddr_init_pcie(struct extent *); 100 101 #endif /* _MIPS_RMI_PCIE_VAR_H_ */ 102 103