| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kInstrBuilder.h | 50 bool IsKill, int Offset) { in addRegIndirectWithDisp()
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| H A D | M68kInstrInfo.cpp | 757 Register SrcReg, bool IsKill, in storeRegToStackSlot()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | Mips16RegisterInfo.cpp | 123 bool IsKill = false; in eliminateFI() local
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| H A D | MipsSERegisterInfo.cpp | 200 bool IsKill = false; in eliminateFI() local
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| H A D | MipsSEFrameLowering.cpp | 832 bool IsKill = !IsRAAndRetAddrIsTaken; in spillCalleeSavedRegisters() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 126 Register SrcReg, bool IsKill, int FI, in storeRegToStackSlot()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIShrinkInstructions.cpp | 245 bool IsKill = NewAddrDwords == Info->VAddrDwords; in shrinkMIMG() local
367 const bool IsKill = SrcReg->isKill(); in shrinkScalarLogicOp() local
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| H A D | SIRegisterInfo.cpp | 82 bool IsKill; member
921 unsigned ValueReg, bool IsKill) { in spillVGPRtoAGPR()
1023 unsigned LoadStoreOp, int Index, Register ValueReg, bool IsKill, in buildSpillLoadStore()
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| H A D | SIInstrInfo.cpp | 2045 bool IsKill = RegOp.isKill(); in swapRegAndNonRegOperand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | FixupStatepointCallerSaved.cpp | 116 bool &IsKill, const TargetInstrInfo &TII, in performCopyPropagation()
418 bool IsKill = true; in spillRegisters() local
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| H A D | ScheduleDAGInstrs.cpp | 403 bool IsKill = MO.getSubReg() == 0 || MO.isUndef(); in addVRegDefDeps() local
1108 bool IsKill = LiveRegs.available(MRI, Reg); in toggleKills() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64AdvSIMDScalarPass.cpp | 275 unsigned Dst, unsigned Src, bool IsKill) { in insertCopy()
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| H A D | AArch64InstrInfo.cpp | 3579 Register SrcReg, bool IsKill, in storeRegPairToStackSlot()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.cpp | 1419 bool IsKill = !HRI.isEHReturnCalleeSaveReg(Reg); in insertCSRSpillsInBlock() local
1782 bool IsKill = MI->getOperand(2).isKill(); in expandStoreInt() local
1845 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVecPred() local
1934 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVec2() local
2032 bool IsKill = MI->getOperand(2).isKill(); in expandStoreVec() local
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| H A D | HexagonBlockRanges.cpp | 326 bool IsKill = Op.isKill(); in computeInitialLiveRanges() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 51 Register SourceRegister, bool IsKill, int FrameIndex, in storeRegToStackSlot()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 244 Register SrcReg, bool IsKill, int FI, in storeRegToStackSlot()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 870 bool IsKill = MO.isKill(); in MergeOpsUpdate() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 1279 bool IsKill = MI.getOperand(1).isKill(); in convertToThreeAddressWithLEA() local
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