xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gvt/mmio_context.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: mmio_context.h,v 1.2 2021/12/18 23:45:31 riastradh Exp $	*/
2 
3 /*
4  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23  * SOFTWARE.
24  *
25  * Authors:
26  *    Eddie Dong <eddie.dong@intel.com>
27  *    Kevin Tian <kevin.tian@intel.com>
28  *
29  * Contributors:
30  *    Zhi Wang <zhi.a.wang@intel.com>
31  *    Changbin Du <changbin.du@intel.com>
32  *    Zhenyu Wang <zhenyuw@linux.intel.com>
33  *    Tina Zhang <tina.zhang@intel.com>
34  *    Bing Niu <bing.niu@intel.com>
35  *
36  */
37 
38 #ifndef __GVT_RENDER_H__
39 #define __GVT_RENDER_H__
40 
41 struct engine_mmio {
42 	int ring_id;
43 	i915_reg_t reg;
44 	u32 mask;
45 	bool in_context;
46 	u32 value;
47 };
48 
49 void intel_gvt_switch_mmio(struct intel_vgpu *pre,
50 			   struct intel_vgpu *next, int ring_id);
51 
52 void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt);
53 
54 bool is_inhibit_context(struct intel_context *ce);
55 
56 int intel_vgpu_restore_inhibit_context(struct intel_vgpu *vgpu,
57 				       struct i915_request *req);
58 #define IS_RESTORE_INHIBIT(a)	\
59 	(_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT) == \
60 	((a) & _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT)))
61 
62 #endif
63