xref: /llvm-project/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp (revision dc04d414df9c243bb90d7cfc683a632a2c032c62) 
1 //===-- SystemZAsmPrinter.cpp - SystemZ LLVM assembly printer -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Streams SystemZ assembly language and associated data, in the form of
10 // MCInsts and MCExprs respectively.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "SystemZAsmPrinter.h"
15 #include "MCTargetDesc/SystemZGNUInstPrinter.h"
16 #include "MCTargetDesc/SystemZHLASMInstPrinter.h"
17 #include "MCTargetDesc/SystemZMCExpr.h"
18 #include "MCTargetDesc/SystemZMCTargetDesc.h"
19 #include "SystemZConstantPoolValue.h"
20 #include "SystemZMCInstLower.h"
21 #include "TargetInfo/SystemZTargetInfo.h"
22 #include "llvm/ADT/StringExtras.h"
23 #include "llvm/BinaryFormat/ELF.h"
24 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
25 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
26 #include "llvm/IR/Mangler.h"
27 #include "llvm/IR/Module.h"
28 #include "llvm/MC/MCExpr.h"
29 #include "llvm/MC/MCInstBuilder.h"
30 #include "llvm/MC/MCSectionELF.h"
31 #include "llvm/MC/MCStreamer.h"
32 #include "llvm/MC/TargetRegistry.h"
33 #include "llvm/Support/Chrono.h"
34 #include "llvm/Support/ConvertEBCDIC.h"
35 #include "llvm/Support/FormatVariadic.h"
36 
37 using namespace llvm;
38 
39 // Return an RI instruction like MI with opcode Opcode, but with the
40 // GR64 register operands turned into GR32s.
41 static MCInst lowerRILow(const MachineInstr *MI, unsigned Opcode) {
42   if (MI->isCompare())
43     return MCInstBuilder(Opcode)
44       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
45       .addImm(MI->getOperand(1).getImm());
46   else
47     return MCInstBuilder(Opcode)
48       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
49       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(1).getReg()))
50       .addImm(MI->getOperand(2).getImm());
51 }
52 
53 // Return an RI instruction like MI with opcode Opcode, but with the
54 // GR64 register operands turned into GRH32s.
55 static MCInst lowerRIHigh(const MachineInstr *MI, unsigned Opcode) {
56   if (MI->isCompare())
57     return MCInstBuilder(Opcode)
58       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
59       .addImm(MI->getOperand(1).getImm());
60   else
61     return MCInstBuilder(Opcode)
62       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
63       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(1).getReg()))
64       .addImm(MI->getOperand(2).getImm());
65 }
66 
67 // Return an RI instruction like MI with opcode Opcode, but with the
68 // R2 register turned into a GR64.
69 static MCInst lowerRIEfLow(const MachineInstr *MI, unsigned Opcode) {
70   return MCInstBuilder(Opcode)
71     .addReg(MI->getOperand(0).getReg())
72     .addReg(MI->getOperand(1).getReg())
73     .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg()))
74     .addImm(MI->getOperand(3).getImm())
75     .addImm(MI->getOperand(4).getImm())
76     .addImm(MI->getOperand(5).getImm());
77 }
78 
79 static const MCSymbolRefExpr *getTLSGetOffset(MCContext &Context) {
80   StringRef Name = "__tls_get_offset";
81   return MCSymbolRefExpr::create(Context.getOrCreateSymbol(Name),
82                                  MCSymbolRefExpr::VK_PLT,
83                                  Context);
84 }
85 
86 static const MCSymbolRefExpr *getGlobalOffsetTable(MCContext &Context) {
87   StringRef Name = "_GLOBAL_OFFSET_TABLE_";
88   return MCSymbolRefExpr::create(Context.getOrCreateSymbol(Name),
89                                  MCSymbolRefExpr::VK_None,
90                                  Context);
91 }
92 
93 // MI is an instruction that accepts an optional alignment hint,
94 // and which was already lowered to LoweredMI.  If the alignment
95 // of the original memory operand is known, update LoweredMI to
96 // an instruction with the corresponding hint set.
97 static void lowerAlignmentHint(const MachineInstr *MI, MCInst &LoweredMI,
98                                unsigned Opcode) {
99   if (MI->memoperands_empty())
100     return;
101 
102   Align Alignment = Align(16);
103   for (MachineInstr::mmo_iterator MMOI = MI->memoperands_begin(),
104          EE = MI->memoperands_end(); MMOI != EE; ++MMOI)
105     if ((*MMOI)->getAlign() < Alignment)
106       Alignment = (*MMOI)->getAlign();
107 
108   unsigned AlignmentHint = 0;
109   if (Alignment >= Align(16))
110     AlignmentHint = 4;
111   else if (Alignment >= Align(8))
112     AlignmentHint = 3;
113   if (AlignmentHint == 0)
114     return;
115 
116   LoweredMI.setOpcode(Opcode);
117   LoweredMI.addOperand(MCOperand::createImm(AlignmentHint));
118 }
119 
120 // MI loads the high part of a vector from memory.  Return an instruction
121 // that uses replicating vector load Opcode to do the same thing.
122 static MCInst lowerSubvectorLoad(const MachineInstr *MI, unsigned Opcode) {
123   return MCInstBuilder(Opcode)
124     .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
125     .addReg(MI->getOperand(1).getReg())
126     .addImm(MI->getOperand(2).getImm())
127     .addReg(MI->getOperand(3).getReg());
128 }
129 
130 // MI stores the high part of a vector to memory.  Return an instruction
131 // that uses elemental vector store Opcode to do the same thing.
132 static MCInst lowerSubvectorStore(const MachineInstr *MI, unsigned Opcode) {
133   return MCInstBuilder(Opcode)
134     .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
135     .addReg(MI->getOperand(1).getReg())
136     .addImm(MI->getOperand(2).getImm())
137     .addReg(MI->getOperand(3).getReg())
138     .addImm(0);
139 }
140 
141 // The XPLINK ABI requires that a no-op encoding the call type is emitted after
142 // each call to a subroutine. This information can be used by the called
143 // function to determine its entry point, e.g. for generating a backtrace. The
144 // call type is encoded as a register number in the bcr instruction. See
145 // enumeration CallType for the possible values.
146 void SystemZAsmPrinter::emitCallInformation(CallType CT) {
147   EmitToStreamer(*OutStreamer,
148                  MCInstBuilder(SystemZ::BCRAsm)
149                      .addImm(0)
150                      .addReg(SystemZMC::GR64Regs[static_cast<unsigned>(CT)]));
151 }
152 
153 uint32_t SystemZAsmPrinter::AssociatedDataAreaTable::insert(const MCSymbol *Sym,
154                                                             unsigned SlotKind) {
155   auto Key = std::make_pair(Sym, SlotKind);
156   auto It = Displacements.find(Key);
157 
158   if (It != Displacements.end())
159     return (*It).second;
160 
161   // Determine length of descriptor.
162   uint32_t Length;
163   switch (SlotKind) {
164   case SystemZII::MO_ADA_DIRECT_FUNC_DESC:
165     Length = 2 * PointerSize;
166     break;
167   default:
168     Length = PointerSize;
169     break;
170   }
171 
172   uint32_t Displacement = NextDisplacement;
173   Displacements[std::make_pair(Sym, SlotKind)] = NextDisplacement;
174   NextDisplacement += Length;
175 
176   return Displacement;
177 }
178 
179 uint32_t
180 SystemZAsmPrinter::AssociatedDataAreaTable::insert(const MachineOperand MO) {
181   MCSymbol *Sym;
182   if (MO.getType() == MachineOperand::MO_GlobalAddress) {
183     const GlobalValue *GV = MO.getGlobal();
184     Sym = MO.getParent()->getMF()->getTarget().getSymbol(GV);
185     assert(Sym && "No symbol");
186   } else if (MO.getType() == MachineOperand::MO_ExternalSymbol) {
187     const char *SymName = MO.getSymbolName();
188     Sym = MO.getParent()->getMF()->getContext().getOrCreateSymbol(SymName);
189     assert(Sym && "No symbol");
190   } else
191     llvm_unreachable("Unexpected operand type");
192 
193   unsigned ADAslotType = MO.getTargetFlags();
194   return insert(Sym, ADAslotType);
195 }
196 
197 void SystemZAsmPrinter::emitInstruction(const MachineInstr *MI) {
198   SystemZ_MC::verifyInstructionPredicates(MI->getOpcode(),
199                                           getSubtargetInfo().getFeatureBits());
200 
201   SystemZMCInstLower Lower(MF->getContext(), *this);
202   MCInst LoweredMI;
203   switch (MI->getOpcode()) {
204   case SystemZ::Return:
205     LoweredMI = MCInstBuilder(SystemZ::BR)
206       .addReg(SystemZ::R14D);
207     break;
208 
209   case SystemZ::Return_XPLINK:
210     LoweredMI = MCInstBuilder(SystemZ::B)
211       .addReg(SystemZ::R7D)
212       .addImm(2)
213       .addReg(0);
214     break;
215 
216   case SystemZ::CondReturn:
217     LoweredMI = MCInstBuilder(SystemZ::BCR)
218       .addImm(MI->getOperand(0).getImm())
219       .addImm(MI->getOperand(1).getImm())
220       .addReg(SystemZ::R14D);
221     break;
222 
223   case SystemZ::CondReturn_XPLINK:
224     LoweredMI = MCInstBuilder(SystemZ::BC)
225       .addImm(MI->getOperand(0).getImm())
226       .addImm(MI->getOperand(1).getImm())
227       .addReg(SystemZ::R7D)
228       .addImm(2)
229       .addReg(0);
230     break;
231 
232   case SystemZ::CRBReturn:
233     LoweredMI = MCInstBuilder(SystemZ::CRB)
234       .addReg(MI->getOperand(0).getReg())
235       .addReg(MI->getOperand(1).getReg())
236       .addImm(MI->getOperand(2).getImm())
237       .addReg(SystemZ::R14D)
238       .addImm(0);
239     break;
240 
241   case SystemZ::CGRBReturn:
242     LoweredMI = MCInstBuilder(SystemZ::CGRB)
243       .addReg(MI->getOperand(0).getReg())
244       .addReg(MI->getOperand(1).getReg())
245       .addImm(MI->getOperand(2).getImm())
246       .addReg(SystemZ::R14D)
247       .addImm(0);
248     break;
249 
250   case SystemZ::CIBReturn:
251     LoweredMI = MCInstBuilder(SystemZ::CIB)
252       .addReg(MI->getOperand(0).getReg())
253       .addImm(MI->getOperand(1).getImm())
254       .addImm(MI->getOperand(2).getImm())
255       .addReg(SystemZ::R14D)
256       .addImm(0);
257     break;
258 
259   case SystemZ::CGIBReturn:
260     LoweredMI = MCInstBuilder(SystemZ::CGIB)
261       .addReg(MI->getOperand(0).getReg())
262       .addImm(MI->getOperand(1).getImm())
263       .addImm(MI->getOperand(2).getImm())
264       .addReg(SystemZ::R14D)
265       .addImm(0);
266     break;
267 
268   case SystemZ::CLRBReturn:
269     LoweredMI = MCInstBuilder(SystemZ::CLRB)
270       .addReg(MI->getOperand(0).getReg())
271       .addReg(MI->getOperand(1).getReg())
272       .addImm(MI->getOperand(2).getImm())
273       .addReg(SystemZ::R14D)
274       .addImm(0);
275     break;
276 
277   case SystemZ::CLGRBReturn:
278     LoweredMI = MCInstBuilder(SystemZ::CLGRB)
279       .addReg(MI->getOperand(0).getReg())
280       .addReg(MI->getOperand(1).getReg())
281       .addImm(MI->getOperand(2).getImm())
282       .addReg(SystemZ::R14D)
283       .addImm(0);
284     break;
285 
286   case SystemZ::CLIBReturn:
287     LoweredMI = MCInstBuilder(SystemZ::CLIB)
288       .addReg(MI->getOperand(0).getReg())
289       .addImm(MI->getOperand(1).getImm())
290       .addImm(MI->getOperand(2).getImm())
291       .addReg(SystemZ::R14D)
292       .addImm(0);
293     break;
294 
295   case SystemZ::CLGIBReturn:
296     LoweredMI = MCInstBuilder(SystemZ::CLGIB)
297       .addReg(MI->getOperand(0).getReg())
298       .addImm(MI->getOperand(1).getImm())
299       .addImm(MI->getOperand(2).getImm())
300       .addReg(SystemZ::R14D)
301       .addImm(0);
302     break;
303 
304   case SystemZ::CallBRASL_XPLINK64:
305     EmitToStreamer(*OutStreamer,
306                    MCInstBuilder(SystemZ::BRASL)
307                        .addReg(SystemZ::R7D)
308                        .addExpr(Lower.getExpr(MI->getOperand(0),
309                                               MCSymbolRefExpr::VK_PLT)));
310     emitCallInformation(CallType::BRASL7);
311     return;
312 
313   case SystemZ::CallBASR_XPLINK64:
314     EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BASR)
315                                      .addReg(SystemZ::R7D)
316                                      .addReg(MI->getOperand(0).getReg()));
317     emitCallInformation(CallType::BASR76);
318     return;
319 
320   case SystemZ::CallBASR_STACKEXT:
321     EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BASR)
322                                      .addReg(SystemZ::R3D)
323                                      .addReg(MI->getOperand(0).getReg()));
324     emitCallInformation(CallType::BASR33);
325     return;
326 
327   case SystemZ::ADA_ENTRY_VALUE:
328   case SystemZ::ADA_ENTRY: {
329     const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
330     const SystemZInstrInfo *TII = Subtarget.getInstrInfo();
331     uint32_t Disp = ADATable.insert(MI->getOperand(1));
332     Register TargetReg = MI->getOperand(0).getReg();
333 
334     Register ADAReg = MI->getOperand(2).getReg();
335     Disp += MI->getOperand(3).getImm();
336     bool LoadAddr = MI->getOpcode() == SystemZ::ADA_ENTRY;
337 
338     unsigned Op0 = LoadAddr ? SystemZ::LA : SystemZ::LG;
339     unsigned Op = TII->getOpcodeForOffset(Op0, Disp);
340 
341     Register IndexReg = 0;
342     if (!Op) {
343       if (TargetReg != ADAReg) {
344         IndexReg = TargetReg;
345         // Use TargetReg to store displacement.
346         EmitToStreamer(
347             *OutStreamer,
348             MCInstBuilder(SystemZ::LLILF).addReg(TargetReg).addImm(Disp));
349       } else
350         EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::ALGFI)
351                                          .addReg(TargetReg)
352                                          .addReg(TargetReg)
353                                          .addImm(Disp));
354       Disp = 0;
355       Op = Op0;
356     }
357     EmitToStreamer(*OutStreamer, MCInstBuilder(Op)
358                                      .addReg(TargetReg)
359                                      .addReg(ADAReg)
360                                      .addImm(Disp)
361                                      .addReg(IndexReg));
362 
363     return;
364   }
365   case SystemZ::CallBRASL:
366     LoweredMI = MCInstBuilder(SystemZ::BRASL)
367       .addReg(SystemZ::R14D)
368       .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_PLT));
369     break;
370 
371   case SystemZ::CallBASR:
372     LoweredMI = MCInstBuilder(SystemZ::BASR)
373       .addReg(SystemZ::R14D)
374       .addReg(MI->getOperand(0).getReg());
375     break;
376 
377   case SystemZ::CallJG:
378     LoweredMI = MCInstBuilder(SystemZ::JG)
379       .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_PLT));
380     break;
381 
382   case SystemZ::CallBRCL:
383     LoweredMI = MCInstBuilder(SystemZ::BRCL)
384       .addImm(MI->getOperand(0).getImm())
385       .addImm(MI->getOperand(1).getImm())
386       .addExpr(Lower.getExpr(MI->getOperand(2), MCSymbolRefExpr::VK_PLT));
387     break;
388 
389   case SystemZ::CallBR:
390     LoweredMI = MCInstBuilder(SystemZ::BR)
391       .addReg(MI->getOperand(0).getReg());
392     break;
393 
394   case SystemZ::CallBCR:
395     LoweredMI = MCInstBuilder(SystemZ::BCR)
396       .addImm(MI->getOperand(0).getImm())
397       .addImm(MI->getOperand(1).getImm())
398       .addReg(MI->getOperand(2).getReg());
399     break;
400 
401   case SystemZ::CRBCall:
402     LoweredMI = MCInstBuilder(SystemZ::CRB)
403       .addReg(MI->getOperand(0).getReg())
404       .addReg(MI->getOperand(1).getReg())
405       .addImm(MI->getOperand(2).getImm())
406       .addReg(MI->getOperand(3).getReg())
407       .addImm(0);
408     break;
409 
410   case SystemZ::CGRBCall:
411     LoweredMI = MCInstBuilder(SystemZ::CGRB)
412       .addReg(MI->getOperand(0).getReg())
413       .addReg(MI->getOperand(1).getReg())
414       .addImm(MI->getOperand(2).getImm())
415       .addReg(MI->getOperand(3).getReg())
416       .addImm(0);
417     break;
418 
419   case SystemZ::CIBCall:
420     LoweredMI = MCInstBuilder(SystemZ::CIB)
421       .addReg(MI->getOperand(0).getReg())
422       .addImm(MI->getOperand(1).getImm())
423       .addImm(MI->getOperand(2).getImm())
424       .addReg(MI->getOperand(3).getReg())
425       .addImm(0);
426     break;
427 
428   case SystemZ::CGIBCall:
429     LoweredMI = MCInstBuilder(SystemZ::CGIB)
430       .addReg(MI->getOperand(0).getReg())
431       .addImm(MI->getOperand(1).getImm())
432       .addImm(MI->getOperand(2).getImm())
433       .addReg(MI->getOperand(3).getReg())
434       .addImm(0);
435     break;
436 
437   case SystemZ::CLRBCall:
438     LoweredMI = MCInstBuilder(SystemZ::CLRB)
439       .addReg(MI->getOperand(0).getReg())
440       .addReg(MI->getOperand(1).getReg())
441       .addImm(MI->getOperand(2).getImm())
442       .addReg(MI->getOperand(3).getReg())
443       .addImm(0);
444     break;
445 
446   case SystemZ::CLGRBCall:
447     LoweredMI = MCInstBuilder(SystemZ::CLGRB)
448       .addReg(MI->getOperand(0).getReg())
449       .addReg(MI->getOperand(1).getReg())
450       .addImm(MI->getOperand(2).getImm())
451       .addReg(MI->getOperand(3).getReg())
452       .addImm(0);
453     break;
454 
455   case SystemZ::CLIBCall:
456     LoweredMI = MCInstBuilder(SystemZ::CLIB)
457       .addReg(MI->getOperand(0).getReg())
458       .addImm(MI->getOperand(1).getImm())
459       .addImm(MI->getOperand(2).getImm())
460       .addReg(MI->getOperand(3).getReg())
461       .addImm(0);
462     break;
463 
464   case SystemZ::CLGIBCall:
465     LoweredMI = MCInstBuilder(SystemZ::CLGIB)
466       .addReg(MI->getOperand(0).getReg())
467       .addImm(MI->getOperand(1).getImm())
468       .addImm(MI->getOperand(2).getImm())
469       .addReg(MI->getOperand(3).getReg())
470       .addImm(0);
471     break;
472 
473   case SystemZ::TLS_GDCALL:
474     LoweredMI = MCInstBuilder(SystemZ::BRASL)
475       .addReg(SystemZ::R14D)
476       .addExpr(getTLSGetOffset(MF->getContext()))
477       .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_TLSGD));
478     break;
479 
480   case SystemZ::TLS_LDCALL:
481     LoweredMI = MCInstBuilder(SystemZ::BRASL)
482       .addReg(SystemZ::R14D)
483       .addExpr(getTLSGetOffset(MF->getContext()))
484       .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_TLSLDM));
485     break;
486 
487   case SystemZ::GOT:
488     LoweredMI = MCInstBuilder(SystemZ::LARL)
489       .addReg(MI->getOperand(0).getReg())
490       .addExpr(getGlobalOffsetTable(MF->getContext()));
491     break;
492 
493   case SystemZ::IILF64:
494     LoweredMI = MCInstBuilder(SystemZ::IILF)
495       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
496       .addImm(MI->getOperand(2).getImm());
497     break;
498 
499   case SystemZ::IIHF64:
500     LoweredMI = MCInstBuilder(SystemZ::IIHF)
501       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
502       .addImm(MI->getOperand(2).getImm());
503     break;
504 
505   case SystemZ::RISBHH:
506   case SystemZ::RISBHL:
507     LoweredMI = lowerRIEfLow(MI, SystemZ::RISBHG);
508     break;
509 
510   case SystemZ::RISBLH:
511   case SystemZ::RISBLL:
512     LoweredMI = lowerRIEfLow(MI, SystemZ::RISBLG);
513     break;
514 
515   case SystemZ::VLVGP32:
516     LoweredMI = MCInstBuilder(SystemZ::VLVGP)
517       .addReg(MI->getOperand(0).getReg())
518       .addReg(SystemZMC::getRegAsGR64(MI->getOperand(1).getReg()))
519       .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg()));
520     break;
521 
522   case SystemZ::VLR32:
523   case SystemZ::VLR64:
524     LoweredMI = MCInstBuilder(SystemZ::VLR)
525       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
526       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg()));
527     break;
528 
529   case SystemZ::VL:
530     Lower.lower(MI, LoweredMI);
531     lowerAlignmentHint(MI, LoweredMI, SystemZ::VLAlign);
532     break;
533 
534   case SystemZ::VST:
535     Lower.lower(MI, LoweredMI);
536     lowerAlignmentHint(MI, LoweredMI, SystemZ::VSTAlign);
537     break;
538 
539   case SystemZ::VLM:
540     Lower.lower(MI, LoweredMI);
541     lowerAlignmentHint(MI, LoweredMI, SystemZ::VLMAlign);
542     break;
543 
544   case SystemZ::VSTM:
545     Lower.lower(MI, LoweredMI);
546     lowerAlignmentHint(MI, LoweredMI, SystemZ::VSTMAlign);
547     break;
548 
549   case SystemZ::VL32:
550     LoweredMI = lowerSubvectorLoad(MI, SystemZ::VLREPF);
551     break;
552 
553   case SystemZ::VL64:
554     LoweredMI = lowerSubvectorLoad(MI, SystemZ::VLREPG);
555     break;
556 
557   case SystemZ::VST32:
558     LoweredMI = lowerSubvectorStore(MI, SystemZ::VSTEF);
559     break;
560 
561   case SystemZ::VST64:
562     LoweredMI = lowerSubvectorStore(MI, SystemZ::VSTEG);
563     break;
564 
565   case SystemZ::LFER:
566     LoweredMI = MCInstBuilder(SystemZ::VLGVF)
567       .addReg(SystemZMC::getRegAsGR64(MI->getOperand(0).getReg()))
568       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg()))
569       .addReg(0).addImm(0);
570     break;
571 
572   case SystemZ::LEFR:
573     LoweredMI = MCInstBuilder(SystemZ::VLVGF)
574       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
575       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
576       .addReg(MI->getOperand(1).getReg())
577       .addReg(0).addImm(0);
578     break;
579 
580 #define LOWER_LOW(NAME)                                                 \
581   case SystemZ::NAME##64: LoweredMI = lowerRILow(MI, SystemZ::NAME); break
582 
583   LOWER_LOW(IILL);
584   LOWER_LOW(IILH);
585   LOWER_LOW(TMLL);
586   LOWER_LOW(TMLH);
587   LOWER_LOW(NILL);
588   LOWER_LOW(NILH);
589   LOWER_LOW(NILF);
590   LOWER_LOW(OILL);
591   LOWER_LOW(OILH);
592   LOWER_LOW(OILF);
593   LOWER_LOW(XILF);
594 
595 #undef LOWER_LOW
596 
597 #define LOWER_HIGH(NAME) \
598   case SystemZ::NAME##64: LoweredMI = lowerRIHigh(MI, SystemZ::NAME); break
599 
600   LOWER_HIGH(IIHL);
601   LOWER_HIGH(IIHH);
602   LOWER_HIGH(TMHL);
603   LOWER_HIGH(TMHH);
604   LOWER_HIGH(NIHL);
605   LOWER_HIGH(NIHH);
606   LOWER_HIGH(NIHF);
607   LOWER_HIGH(OIHL);
608   LOWER_HIGH(OIHH);
609   LOWER_HIGH(OIHF);
610   LOWER_HIGH(XIHF);
611 
612 #undef LOWER_HIGH
613 
614   case SystemZ::Serialize:
615     if (MF->getSubtarget<SystemZSubtarget>().hasFastSerialization())
616       LoweredMI = MCInstBuilder(SystemZ::BCRAsm)
617         .addImm(14).addReg(SystemZ::R0D);
618     else
619       LoweredMI = MCInstBuilder(SystemZ::BCRAsm)
620         .addImm(15).addReg(SystemZ::R0D);
621     break;
622 
623   // We want to emit "j .+2" for traps, jumping to the relative immediate field
624   // of the jump instruction, which is an illegal instruction. We cannot emit a
625   // "." symbol, so create and emit a temp label before the instruction and use
626   // that instead.
627   case SystemZ::Trap: {
628     MCSymbol *DotSym = OutContext.createTempSymbol();
629     OutStreamer->emitLabel(DotSym);
630 
631     const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(DotSym, OutContext);
632     const MCConstantExpr *ConstExpr = MCConstantExpr::create(2, OutContext);
633     LoweredMI = MCInstBuilder(SystemZ::J)
634       .addExpr(MCBinaryExpr::createAdd(Expr, ConstExpr, OutContext));
635     }
636     break;
637 
638   // Conditional traps will create a branch on condition instruction that jumps
639   // to the relative immediate field of the jump instruction. (eg. "jo .+2")
640   case SystemZ::CondTrap: {
641     MCSymbol *DotSym = OutContext.createTempSymbol();
642     OutStreamer->emitLabel(DotSym);
643 
644     const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(DotSym, OutContext);
645     const MCConstantExpr *ConstExpr = MCConstantExpr::create(2, OutContext);
646     LoweredMI = MCInstBuilder(SystemZ::BRC)
647       .addImm(MI->getOperand(0).getImm())
648       .addImm(MI->getOperand(1).getImm())
649       .addExpr(MCBinaryExpr::createAdd(Expr, ConstExpr, OutContext));
650     }
651     break;
652 
653   case TargetOpcode::FENTRY_CALL:
654     LowerFENTRY_CALL(*MI, Lower);
655     return;
656 
657   case TargetOpcode::STACKMAP:
658     LowerSTACKMAP(*MI);
659     return;
660 
661   case TargetOpcode::PATCHPOINT:
662     LowerPATCHPOINT(*MI, Lower);
663     return;
664 
665   case TargetOpcode::PATCHABLE_FUNCTION_ENTER:
666     LowerPATCHABLE_FUNCTION_ENTER(*MI, Lower);
667     return;
668 
669   case TargetOpcode::PATCHABLE_RET:
670     LowerPATCHABLE_RET(*MI, Lower);
671     return;
672 
673   case TargetOpcode::PATCHABLE_FUNCTION_EXIT:
674     llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");
675 
676   case TargetOpcode::PATCHABLE_TAIL_CALL:
677     // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
678     // normal function exit from a tail exit.
679     llvm_unreachable("Tail call is handled in the normal case. See comments "
680                      "around this assert.");
681 
682   case SystemZ::EXRL_Pseudo: {
683     unsigned TargetInsOpc = MI->getOperand(0).getImm();
684     Register LenMinus1Reg = MI->getOperand(1).getReg();
685     Register DestReg = MI->getOperand(2).getReg();
686     int64_t DestDisp = MI->getOperand(3).getImm();
687     Register SrcReg = MI->getOperand(4).getReg();
688     int64_t SrcDisp = MI->getOperand(5).getImm();
689 
690     SystemZTargetStreamer *TS = getTargetStreamer();
691     MCSymbol *DotSym = nullptr;
692     MCInst ET = MCInstBuilder(TargetInsOpc).addReg(DestReg)
693       .addImm(DestDisp).addImm(1).addReg(SrcReg).addImm(SrcDisp);
694     SystemZTargetStreamer::MCInstSTIPair ET_STI(ET, &MF->getSubtarget());
695     SystemZTargetStreamer::EXRLT2SymMap::iterator I =
696         TS->EXRLTargets2Sym.find(ET_STI);
697     if (I != TS->EXRLTargets2Sym.end())
698       DotSym = I->second;
699     else
700       TS->EXRLTargets2Sym[ET_STI] = DotSym = OutContext.createTempSymbol();
701     const MCSymbolRefExpr *Dot = MCSymbolRefExpr::create(DotSym, OutContext);
702     EmitToStreamer(
703         *OutStreamer,
704         MCInstBuilder(SystemZ::EXRL).addReg(LenMinus1Reg).addExpr(Dot));
705     return;
706   }
707 
708   // EH_SjLj_Setup is a dummy terminator instruction of size 0.
709   // It is used to handle the clobber register for builtin setjmp.
710   case SystemZ::EH_SjLj_Setup:
711     return;
712 
713   default:
714     Lower.lower(MI, LoweredMI);
715     break;
716   }
717   EmitToStreamer(*OutStreamer, LoweredMI);
718 }
719 
720 // Emit the largest nop instruction smaller than or equal to NumBytes
721 // bytes.  Return the size of nop emitted.
722 static unsigned EmitNop(MCContext &OutContext, MCStreamer &OutStreamer,
723                         unsigned NumBytes, const MCSubtargetInfo &STI) {
724   if (NumBytes < 2) {
725     llvm_unreachable("Zero nops?");
726     return 0;
727   }
728   else if (NumBytes < 4) {
729     OutStreamer.emitInstruction(
730         MCInstBuilder(SystemZ::BCRAsm).addImm(0).addReg(SystemZ::R0D), STI);
731     return 2;
732   }
733   else if (NumBytes < 6) {
734     OutStreamer.emitInstruction(
735         MCInstBuilder(SystemZ::BCAsm).addImm(0).addReg(0).addImm(0).addReg(0),
736         STI);
737     return 4;
738   }
739   else {
740     MCSymbol *DotSym = OutContext.createTempSymbol();
741     const MCSymbolRefExpr *Dot = MCSymbolRefExpr::create(DotSym, OutContext);
742     OutStreamer.emitLabel(DotSym);
743     OutStreamer.emitInstruction(
744         MCInstBuilder(SystemZ::BRCLAsm).addImm(0).addExpr(Dot), STI);
745     return 6;
746   }
747 }
748 
749 void SystemZAsmPrinter::LowerFENTRY_CALL(const MachineInstr &MI,
750                                          SystemZMCInstLower &Lower) {
751   MCContext &Ctx = MF->getContext();
752   if (MF->getFunction().hasFnAttribute("mrecord-mcount")) {
753     MCSymbol *DotSym = OutContext.createTempSymbol();
754     OutStreamer->pushSection();
755     OutStreamer->switchSection(
756         Ctx.getELFSection("__mcount_loc", ELF::SHT_PROGBITS, ELF::SHF_ALLOC));
757     OutStreamer->emitSymbolValue(DotSym, 8);
758     OutStreamer->popSection();
759     OutStreamer->emitLabel(DotSym);
760   }
761 
762   if (MF->getFunction().hasFnAttribute("mnop-mcount")) {
763     EmitNop(Ctx, *OutStreamer, 6, getSubtargetInfo());
764     return;
765   }
766 
767   MCSymbol *fentry = Ctx.getOrCreateSymbol("__fentry__");
768   const MCSymbolRefExpr *Op =
769       MCSymbolRefExpr::create(fentry, MCSymbolRefExpr::VK_PLT, Ctx);
770   OutStreamer->emitInstruction(
771       MCInstBuilder(SystemZ::BRASL).addReg(SystemZ::R0D).addExpr(Op),
772       getSubtargetInfo());
773 }
774 
775 void SystemZAsmPrinter::LowerSTACKMAP(const MachineInstr &MI) {
776   auto *TII = MF->getSubtarget<SystemZSubtarget>().getInstrInfo();
777 
778   unsigned NumNOPBytes = MI.getOperand(1).getImm();
779 
780   auto &Ctx = OutStreamer->getContext();
781   MCSymbol *MILabel = Ctx.createTempSymbol();
782   OutStreamer->emitLabel(MILabel);
783 
784   SM.recordStackMap(*MILabel, MI);
785   assert(NumNOPBytes % 2 == 0 && "Invalid number of NOP bytes requested!");
786 
787   // Scan ahead to trim the shadow.
788   unsigned ShadowBytes = 0;
789   const MachineBasicBlock &MBB = *MI.getParent();
790   MachineBasicBlock::const_iterator MII(MI);
791   ++MII;
792   while (ShadowBytes < NumNOPBytes) {
793     if (MII == MBB.end() ||
794         MII->getOpcode() == TargetOpcode::PATCHPOINT ||
795         MII->getOpcode() == TargetOpcode::STACKMAP)
796       break;
797     ShadowBytes += TII->getInstSizeInBytes(*MII);
798     if (MII->isCall())
799       break;
800     ++MII;
801   }
802 
803   // Emit nops.
804   while (ShadowBytes < NumNOPBytes)
805     ShadowBytes += EmitNop(OutContext, *OutStreamer, NumNOPBytes - ShadowBytes,
806                            getSubtargetInfo());
807 }
808 
809 // Lower a patchpoint of the form:
810 // [<def>], <id>, <numBytes>, <target>, <numArgs>
811 void SystemZAsmPrinter::LowerPATCHPOINT(const MachineInstr &MI,
812                                         SystemZMCInstLower &Lower) {
813   auto &Ctx = OutStreamer->getContext();
814   MCSymbol *MILabel = Ctx.createTempSymbol();
815   OutStreamer->emitLabel(MILabel);
816 
817   SM.recordPatchPoint(*MILabel, MI);
818   PatchPointOpers Opers(&MI);
819 
820   unsigned EncodedBytes = 0;
821   const MachineOperand &CalleeMO = Opers.getCallTarget();
822 
823   if (CalleeMO.isImm()) {
824     uint64_t CallTarget = CalleeMO.getImm();
825     if (CallTarget) {
826       unsigned ScratchIdx = -1;
827       unsigned ScratchReg = 0;
828       do {
829         ScratchIdx = Opers.getNextScratchIdx(ScratchIdx + 1);
830         ScratchReg = MI.getOperand(ScratchIdx).getReg();
831       } while (ScratchReg == SystemZ::R0D);
832 
833       // Materialize the call target address
834       EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::LLILF)
835                                       .addReg(ScratchReg)
836                                       .addImm(CallTarget & 0xFFFFFFFF));
837       EncodedBytes += 6;
838       if (CallTarget >> 32) {
839         EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::IIHF)
840                                         .addReg(ScratchReg)
841                                         .addImm(CallTarget >> 32));
842         EncodedBytes += 6;
843       }
844 
845       EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BASR)
846                                      .addReg(SystemZ::R14D)
847                                      .addReg(ScratchReg));
848       EncodedBytes += 2;
849     }
850   } else if (CalleeMO.isGlobal()) {
851     const MCExpr *Expr = Lower.getExpr(CalleeMO, MCSymbolRefExpr::VK_PLT);
852     EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BRASL)
853                                    .addReg(SystemZ::R14D)
854                                    .addExpr(Expr));
855     EncodedBytes += 6;
856   }
857 
858   // Emit padding.
859   unsigned NumBytes = Opers.getNumPatchBytes();
860   assert(NumBytes >= EncodedBytes &&
861          "Patchpoint can't request size less than the length of a call.");
862   assert((NumBytes - EncodedBytes) % 2 == 0 &&
863          "Invalid number of NOP bytes requested!");
864   while (EncodedBytes < NumBytes)
865     EncodedBytes += EmitNop(OutContext, *OutStreamer, NumBytes - EncodedBytes,
866                             getSubtargetInfo());
867 }
868 
869 void SystemZAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(
870     const MachineInstr &MI, SystemZMCInstLower &Lower) {
871   // .begin:
872   //   j .end    # -> stmg    %r2, %r15, 16(%r15)
873   //   nop
874   //   llilf   %2, FuncID
875   //   brasl   %r14, __xray_FunctionEntry@GOT
876   // .end:
877   //
878   // Update compiler-rt/lib/xray/xray_s390x.cpp accordingly when number
879   // of instructions change.
880   bool HasVectorFeature =
881       TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureVector) &&
882       !TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureSoftFloat);
883   MCSymbol *FuncEntry = OutContext.getOrCreateSymbol(
884       HasVectorFeature ? "__xray_FunctionEntryVec" : "__xray_FunctionEntry");
885   MCSymbol *BeginOfSled = OutContext.createTempSymbol("xray_sled_", true);
886   MCSymbol *EndOfSled = OutContext.createTempSymbol();
887   OutStreamer->emitLabel(BeginOfSled);
888   EmitToStreamer(*OutStreamer,
889                  MCInstBuilder(SystemZ::J)
890                      .addExpr(MCSymbolRefExpr::create(EndOfSled, OutContext)));
891   EmitNop(OutContext, *OutStreamer, 2, getSubtargetInfo());
892   EmitToStreamer(*OutStreamer,
893                  MCInstBuilder(SystemZ::LLILF).addReg(SystemZ::R2D).addImm(0));
894   EmitToStreamer(*OutStreamer,
895                  MCInstBuilder(SystemZ::BRASL)
896                      .addReg(SystemZ::R14D)
897                      .addExpr(MCSymbolRefExpr::create(
898                          FuncEntry, MCSymbolRefExpr::VK_PLT, OutContext)));
899   OutStreamer->emitLabel(EndOfSled);
900   recordSled(BeginOfSled, MI, SledKind::FUNCTION_ENTER, 2);
901 }
902 
903 void SystemZAsmPrinter::LowerPATCHABLE_RET(const MachineInstr &MI,
904                                            SystemZMCInstLower &Lower) {
905   unsigned OpCode = MI.getOperand(0).getImm();
906   MCSymbol *FallthroughLabel = nullptr;
907   if (OpCode == SystemZ::CondReturn) {
908     FallthroughLabel = OutContext.createTempSymbol();
909     int64_t Cond0 = MI.getOperand(1).getImm();
910     int64_t Cond1 = MI.getOperand(2).getImm();
911     EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BRC)
912                                      .addImm(Cond0)
913                                      .addImm(Cond1 ^ Cond0)
914                                      .addExpr(MCSymbolRefExpr::create(
915                                          FallthroughLabel, OutContext)));
916   }
917   // .begin:
918   //   br %r14    # -> stmg    %r2, %r15, 24(%r15)
919   //   nop
920   //   nop
921   //   llilf   %2,FuncID
922   //   j       __xray_FunctionExit@GOT
923   //
924   // Update compiler-rt/lib/xray/xray_s390x.cpp accordingly when number
925   // of instructions change.
926   bool HasVectorFeature =
927       TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureVector) &&
928       !TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureSoftFloat);
929   MCSymbol *FuncExit = OutContext.getOrCreateSymbol(
930       HasVectorFeature ? "__xray_FunctionExitVec" : "__xray_FunctionExit");
931   MCSymbol *BeginOfSled = OutContext.createTempSymbol("xray_sled_", true);
932   OutStreamer->emitLabel(BeginOfSled);
933   EmitToStreamer(*OutStreamer,
934                  MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D));
935   EmitNop(OutContext, *OutStreamer, 4, getSubtargetInfo());
936   EmitToStreamer(*OutStreamer,
937                  MCInstBuilder(SystemZ::LLILF).addReg(SystemZ::R2D).addImm(0));
938   EmitToStreamer(*OutStreamer,
939                  MCInstBuilder(SystemZ::J)
940                      .addExpr(MCSymbolRefExpr::create(
941                          FuncExit, MCSymbolRefExpr::VK_PLT, OutContext)));
942   if (FallthroughLabel)
943     OutStreamer->emitLabel(FallthroughLabel);
944   recordSled(BeginOfSled, MI, SledKind::FUNCTION_EXIT, 2);
945 }
946 
947 // The *alignment* of 128-bit vector types is different between the software
948 // and hardware vector ABIs. If the there is an externally visible use of a
949 // vector type in the module it should be annotated with an attribute.
950 void SystemZAsmPrinter::emitAttributes(Module &M) {
951   if (M.getModuleFlag("s390x-visible-vector-ABI")) {
952     bool HasVectorFeature =
953       TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureVector);
954     OutStreamer->emitGNUAttribute(8, HasVectorFeature ? 2 : 1);
955   }
956 }
957 
958 // Convert a SystemZ-specific constant pool modifier into the associated
959 // MCSymbolRefExpr variant kind.
960 static MCSymbolRefExpr::VariantKind
961 getModifierVariantKind(SystemZCP::SystemZCPModifier Modifier) {
962   switch (Modifier) {
963   case SystemZCP::TLSGD: return MCSymbolRefExpr::VK_TLSGD;
964   case SystemZCP::TLSLDM: return MCSymbolRefExpr::VK_TLSLDM;
965   case SystemZCP::DTPOFF: return MCSymbolRefExpr::VK_DTPOFF;
966   case SystemZCP::NTPOFF: return MCSymbolRefExpr::VK_NTPOFF;
967   }
968   llvm_unreachable("Invalid SystemCPModifier!");
969 }
970 
971 void SystemZAsmPrinter::emitMachineConstantPoolValue(
972     MachineConstantPoolValue *MCPV) {
973   auto *ZCPV = static_cast<SystemZConstantPoolValue*>(MCPV);
974 
975   const MCExpr *Expr =
976     MCSymbolRefExpr::create(getSymbol(ZCPV->getGlobalValue()),
977                             getModifierVariantKind(ZCPV->getModifier()),
978                             OutContext);
979   uint64_t Size = getDataLayout().getTypeAllocSize(ZCPV->getType());
980 
981   OutStreamer->emitValue(Expr, Size);
982 }
983 
984 static void printFormattedRegName(const MCAsmInfo *MAI, unsigned RegNo,
985                                   raw_ostream &OS) {
986   const char *RegName;
987   if (MAI->getAssemblerDialect() == AD_HLASM) {
988     RegName = SystemZHLASMInstPrinter::getRegisterName(RegNo);
989     // Skip register prefix so that only register number is left
990     assert(isalpha(RegName[0]) && isdigit(RegName[1]));
991     OS << (RegName + 1);
992   } else {
993     RegName = SystemZGNUInstPrinter::getRegisterName(RegNo);
994     OS << '%' << RegName;
995   }
996 }
997 
998 static void printReg(unsigned Reg, const MCAsmInfo *MAI, raw_ostream &OS) {
999   if (!Reg)
1000     OS << '0';
1001   else
1002     printFormattedRegName(MAI, Reg, OS);
1003 }
1004 
1005 static void printOperand(const MCOperand &MCOp, const MCAsmInfo *MAI,
1006                          raw_ostream &OS) {
1007   if (MCOp.isReg())
1008     printReg(MCOp.getReg(), MAI, OS);
1009   else if (MCOp.isImm())
1010     OS << MCOp.getImm();
1011   else if (MCOp.isExpr())
1012     MCOp.getExpr()->print(OS, MAI);
1013   else
1014     llvm_unreachable("Invalid operand");
1015 }
1016 
1017 static void printAddress(const MCAsmInfo *MAI, unsigned Base,
1018                          const MCOperand &DispMO, unsigned Index,
1019                          raw_ostream &OS) {
1020   printOperand(DispMO, MAI, OS);
1021   if (Base || Index) {
1022     OS << '(';
1023     if (Index) {
1024       printFormattedRegName(MAI, Index, OS);
1025       if (Base)
1026         OS << ',';
1027     }
1028     if (Base)
1029       printFormattedRegName(MAI, Base, OS);
1030     OS << ')';
1031   }
1032 }
1033 
1034 bool SystemZAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
1035                                         const char *ExtraCode,
1036                                         raw_ostream &OS) {
1037   const MCRegisterInfo &MRI = *TM.getMCRegisterInfo();
1038   const MachineOperand &MO = MI->getOperand(OpNo);
1039   MCOperand MCOp;
1040   if (ExtraCode) {
1041     if (ExtraCode[0] == 'N' && !ExtraCode[1] && MO.isReg() &&
1042         SystemZ::GR128BitRegClass.contains(MO.getReg()))
1043       MCOp =
1044           MCOperand::createReg(MRI.getSubReg(MO.getReg(), SystemZ::subreg_l64));
1045     else
1046       return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS);
1047   } else {
1048     SystemZMCInstLower Lower(MF->getContext(), *this);
1049     MCOp = Lower.lowerOperand(MO);
1050   }
1051   printOperand(MCOp, MAI, OS);
1052   return false;
1053 }
1054 
1055 bool SystemZAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
1056                                               unsigned OpNo,
1057                                               const char *ExtraCode,
1058                                               raw_ostream &OS) {
1059   if (ExtraCode && ExtraCode[0] && !ExtraCode[1]) {
1060     switch (ExtraCode[0]) {
1061     case 'A':
1062       // Unlike EmitMachineNode(), EmitSpecialNode(INLINEASM) does not call
1063       // setMemRefs(), so MI->memoperands() is empty and the alignment
1064       // information is not available.
1065       return false;
1066     case 'O':
1067       OS << MI->getOperand(OpNo + 1).getImm();
1068       return false;
1069     case 'R':
1070       ::printReg(MI->getOperand(OpNo).getReg(), MAI, OS);
1071       return false;
1072     }
1073   }
1074   printAddress(MAI, MI->getOperand(OpNo).getReg(),
1075                MCOperand::createImm(MI->getOperand(OpNo + 1).getImm()),
1076                MI->getOperand(OpNo + 2).getReg(), OS);
1077   return false;
1078 }
1079 
1080 void SystemZAsmPrinter::emitEndOfAsmFile(Module &M) {
1081   auto TT = OutContext.getTargetTriple();
1082   if (TT.isOSzOS()) {
1083     emitADASection();
1084     emitIDRLSection(M);
1085   }
1086   emitAttributes(M);
1087 }
1088 
1089 void SystemZAsmPrinter::emitADASection() {
1090   OutStreamer->pushSection();
1091 
1092   const unsigned PointerSize = getDataLayout().getPointerSize();
1093   OutStreamer->switchSection(getObjFileLowering().getADASection());
1094 
1095   unsigned EmittedBytes = 0;
1096   for (auto &Entry : ADATable.getTable()) {
1097     const MCSymbol *Sym;
1098     unsigned SlotKind;
1099     std::tie(Sym, SlotKind) = Entry.first;
1100     unsigned Offset = Entry.second;
1101     assert(Offset == EmittedBytes && "Offset not as expected");
1102     (void)EmittedBytes;
1103 #define EMIT_COMMENT(Str)                                                      \
1104   OutStreamer->AddComment(Twine("Offset ")                                     \
1105                               .concat(utostr(Offset))                          \
1106                               .concat(" " Str " ")                             \
1107                               .concat(Sym->getName()));
1108     switch (SlotKind) {
1109     case SystemZII::MO_ADA_DIRECT_FUNC_DESC:
1110       // Language Environment DLL logic requires function descriptors, for
1111       // imported functions, that are placed in the ADA to be 8 byte aligned.
1112       EMIT_COMMENT("function descriptor of");
1113       OutStreamer->emitValue(
1114           SystemZMCExpr::create(SystemZMCExpr::VK_SystemZ_RCon,
1115                                 MCSymbolRefExpr::create(Sym, OutContext),
1116                                 OutContext),
1117           PointerSize);
1118       OutStreamer->emitValue(
1119           SystemZMCExpr::create(SystemZMCExpr::VK_SystemZ_VCon,
1120                                 MCSymbolRefExpr::create(Sym, OutContext),
1121                                 OutContext),
1122           PointerSize);
1123       EmittedBytes += PointerSize * 2;
1124       break;
1125     case SystemZII::MO_ADA_DATA_SYMBOL_ADDR:
1126       EMIT_COMMENT("pointer to data symbol");
1127       OutStreamer->emitValue(
1128           SystemZMCExpr::create(SystemZMCExpr::VK_SystemZ_None,
1129                                 MCSymbolRefExpr::create(Sym, OutContext),
1130                                 OutContext),
1131           PointerSize);
1132       EmittedBytes += PointerSize;
1133       break;
1134     case SystemZII::MO_ADA_INDIRECT_FUNC_DESC: {
1135       MCSymbol *Alias = OutContext.createTempSymbol(
1136           Twine(Sym->getName()).concat("@indirect"));
1137       OutStreamer->emitAssignment(Alias,
1138                                   MCSymbolRefExpr::create(Sym, OutContext));
1139       OutStreamer->emitSymbolAttribute(Alias, MCSA_IndirectSymbol);
1140 
1141       EMIT_COMMENT("pointer to function descriptor");
1142       OutStreamer->emitValue(
1143           SystemZMCExpr::create(SystemZMCExpr::VK_SystemZ_VCon,
1144                                 MCSymbolRefExpr::create(Alias, OutContext),
1145                                 OutContext),
1146           PointerSize);
1147       EmittedBytes += PointerSize;
1148       break;
1149     }
1150     default:
1151       llvm_unreachable("Unexpected slot kind");
1152     }
1153 #undef EMIT_COMMENT
1154   }
1155   OutStreamer->popSection();
1156 }
1157 
1158 static std::string getProductID(Module &M) {
1159   std::string ProductID;
1160   if (auto *MD = M.getModuleFlag("zos_product_id"))
1161     ProductID = cast<MDString>(MD)->getString().str();
1162   if (ProductID.empty())
1163     ProductID = "LLVM";
1164   return ProductID;
1165 }
1166 
1167 static uint32_t getProductVersion(Module &M) {
1168   if (auto *VersionVal = mdconst::extract_or_null<ConstantInt>(
1169           M.getModuleFlag("zos_product_major_version")))
1170     return VersionVal->getZExtValue();
1171   return LLVM_VERSION_MAJOR;
1172 }
1173 
1174 static uint32_t getProductRelease(Module &M) {
1175   if (auto *ReleaseVal = mdconst::extract_or_null<ConstantInt>(
1176           M.getModuleFlag("zos_product_minor_version")))
1177     return ReleaseVal->getZExtValue();
1178   return LLVM_VERSION_MINOR;
1179 }
1180 
1181 static uint32_t getProductPatch(Module &M) {
1182   if (auto *PatchVal = mdconst::extract_or_null<ConstantInt>(
1183           M.getModuleFlag("zos_product_patchlevel")))
1184     return PatchVal->getZExtValue();
1185   return LLVM_VERSION_PATCH;
1186 }
1187 
1188 static time_t getTranslationTime(Module &M) {
1189   std::time_t Time = 0;
1190   if (auto *Val = mdconst::extract_or_null<ConstantInt>(
1191           M.getModuleFlag("zos_translation_time"))) {
1192     long SecondsSinceEpoch = Val->getSExtValue();
1193     Time = static_cast<time_t>(SecondsSinceEpoch);
1194   }
1195   return Time;
1196 }
1197 
1198 void SystemZAsmPrinter::emitIDRLSection(Module &M) {
1199   OutStreamer->pushSection();
1200   OutStreamer->switchSection(getObjFileLowering().getIDRLSection());
1201   constexpr unsigned IDRLDataLength = 30;
1202   std::time_t Time = getTranslationTime(M);
1203 
1204   uint32_t ProductVersion = getProductVersion(M);
1205   uint32_t ProductRelease = getProductRelease(M);
1206 
1207   std::string ProductID = getProductID(M);
1208 
1209   SmallString<IDRLDataLength + 1> TempStr;
1210   raw_svector_ostream O(TempStr);
1211   O << formatv("{0,-10}{1,0-2:d}{2,0-2:d}{3:%Y%m%d%H%M%S}{4,0-2}",
1212                ProductID.substr(0, 10).c_str(), ProductVersion, ProductRelease,
1213                llvm::sys::toUtcTime(Time), "0");
1214   SmallString<IDRLDataLength> Data;
1215   ConverterEBCDIC::convertToEBCDIC(TempStr, Data);
1216 
1217   OutStreamer->emitInt8(0);               // Reserved.
1218   OutStreamer->emitInt8(3);               // Format.
1219   OutStreamer->emitInt16(IDRLDataLength); // Length.
1220   OutStreamer->emitBytes(Data.str());
1221   OutStreamer->popSection();
1222 }
1223 
1224 void SystemZAsmPrinter::emitFunctionBodyEnd() {
1225   if (TM.getTargetTriple().isOSzOS()) {
1226     // Emit symbol for the end of function if the z/OS target streamer
1227     // is used. This is needed to calculate the size of the function.
1228     MCSymbol *FnEndSym = createTempSymbol("func_end");
1229     OutStreamer->emitLabel(FnEndSym);
1230 
1231     OutStreamer->pushSection();
1232     OutStreamer->switchSection(getObjFileLowering().getPPA1Section());
1233     emitPPA1(FnEndSym);
1234     OutStreamer->popSection();
1235 
1236     CurrentFnPPA1Sym = nullptr;
1237     CurrentFnEPMarkerSym = nullptr;
1238   }
1239 }
1240 
1241 static void emitPPA1Flags(std::unique_ptr<MCStreamer> &OutStreamer, bool VarArg,
1242                           bool StackProtector, bool FPRMask, bool VRMask,
1243                           bool EHBlock, bool HasName) {
1244   enum class PPA1Flag1 : uint8_t {
1245     DSA64Bit = (0x80 >> 0),
1246     VarArg = (0x80 >> 7),
1247     LLVM_MARK_AS_BITMASK_ENUM(DSA64Bit)
1248   };
1249   enum class PPA1Flag2 : uint8_t {
1250     ExternalProcedure = (0x80 >> 0),
1251     STACKPROTECTOR = (0x80 >> 3),
1252     LLVM_MARK_AS_BITMASK_ENUM(ExternalProcedure)
1253   };
1254   enum class PPA1Flag3 : uint8_t {
1255     FPRMask = (0x80 >> 2),
1256     LLVM_MARK_AS_BITMASK_ENUM(FPRMask)
1257   };
1258   enum class PPA1Flag4 : uint8_t {
1259     EPMOffsetPresent = (0x80 >> 0),
1260     VRMask = (0x80 >> 2),
1261     EHBlock = (0x80 >> 3),
1262     ProcedureNamePresent = (0x80 >> 7),
1263     LLVM_MARK_AS_BITMASK_ENUM(EPMOffsetPresent)
1264   };
1265 
1266   // Declare optional section flags that can be modified.
1267   auto Flags1 = PPA1Flag1(0);
1268   auto Flags2 = PPA1Flag2::ExternalProcedure;
1269   auto Flags3 = PPA1Flag3(0);
1270   auto Flags4 = PPA1Flag4::EPMOffsetPresent;
1271 
1272   Flags1 |= PPA1Flag1::DSA64Bit;
1273 
1274   if (VarArg)
1275     Flags1 |= PPA1Flag1::VarArg;
1276 
1277   if (StackProtector)
1278     Flags2 |= PPA1Flag2::STACKPROTECTOR;
1279 
1280   // SavedGPRMask, SavedFPRMask, and SavedVRMask are precomputed in.
1281   if (FPRMask)
1282     Flags3 |= PPA1Flag3::FPRMask; // Add emit FPR mask flag.
1283 
1284   if (VRMask)
1285     Flags4 |= PPA1Flag4::VRMask; // Add emit VR mask flag.
1286 
1287   if (EHBlock)
1288     Flags4 |= PPA1Flag4::EHBlock; // Add optional EH block.
1289 
1290   if (HasName)
1291     Flags4 |= PPA1Flag4::ProcedureNamePresent; // Add optional name block.
1292 
1293   OutStreamer->AddComment("PPA1 Flags 1");
1294   if ((Flags1 & PPA1Flag1::DSA64Bit) == PPA1Flag1::DSA64Bit)
1295     OutStreamer->AddComment("  Bit 0: 1 = 64-bit DSA");
1296   else
1297     OutStreamer->AddComment("  Bit 0: 0 = 32-bit DSA");
1298   if ((Flags1 & PPA1Flag1::VarArg) == PPA1Flag1::VarArg)
1299     OutStreamer->AddComment("  Bit 7: 1 = Vararg function");
1300   OutStreamer->emitInt8(static_cast<uint8_t>(Flags1)); // Flags 1.
1301 
1302   OutStreamer->AddComment("PPA1 Flags 2");
1303   if ((Flags2 & PPA1Flag2::ExternalProcedure) == PPA1Flag2::ExternalProcedure)
1304     OutStreamer->AddComment("  Bit 0: 1 = External procedure");
1305   if ((Flags2 & PPA1Flag2::STACKPROTECTOR) == PPA1Flag2::STACKPROTECTOR)
1306     OutStreamer->AddComment("  Bit 3: 1 = STACKPROTECT is enabled");
1307   else
1308     OutStreamer->AddComment("  Bit 3: 0 = STACKPROTECT is not enabled");
1309   OutStreamer->emitInt8(static_cast<uint8_t>(Flags2)); // Flags 2.
1310 
1311   OutStreamer->AddComment("PPA1 Flags 3");
1312   if ((Flags3 & PPA1Flag3::FPRMask) == PPA1Flag3::FPRMask)
1313     OutStreamer->AddComment("  Bit 2: 1 = FP Reg Mask is in optional area");
1314   OutStreamer->emitInt8(
1315       static_cast<uint8_t>(Flags3)); // Flags 3 (optional sections).
1316 
1317   OutStreamer->AddComment("PPA1 Flags 4");
1318   if ((Flags4 & PPA1Flag4::VRMask) == PPA1Flag4::VRMask)
1319     OutStreamer->AddComment("  Bit 2: 1 = Vector Reg Mask is in optional area");
1320   if ((Flags4 & PPA1Flag4::EHBlock) == PPA1Flag4::EHBlock)
1321     OutStreamer->AddComment("  Bit 3: 1 = C++ EH block");
1322   if ((Flags4 & PPA1Flag4::ProcedureNamePresent) ==
1323       PPA1Flag4::ProcedureNamePresent)
1324     OutStreamer->AddComment("  Bit 7: 1 = Name Length and Name");
1325   OutStreamer->emitInt8(static_cast<uint8_t>(
1326       Flags4)); // Flags 4 (optional sections, always emit these).
1327 }
1328 
1329 static void emitPPA1Name(std::unique_ptr<MCStreamer> &OutStreamer,
1330                          StringRef OutName) {
1331   size_t NameSize = OutName.size();
1332   uint16_t OutSize;
1333   if (NameSize < UINT16_MAX) {
1334     OutSize = static_cast<uint16_t>(NameSize);
1335   } else {
1336     OutName = OutName.substr(0, UINT16_MAX);
1337     OutSize = UINT16_MAX;
1338   }
1339   // Emit padding to ensure that the next optional field word-aligned.
1340   uint8_t ExtraZeros = 4 - ((2 + OutSize) % 4);
1341 
1342   SmallString<512> OutnameConv;
1343   ConverterEBCDIC::convertToEBCDIC(OutName, OutnameConv);
1344   OutName = OutnameConv.str();
1345 
1346   OutStreamer->AddComment("Length of Name");
1347   OutStreamer->emitInt16(OutSize);
1348   OutStreamer->AddComment("Name of Function");
1349   OutStreamer->emitBytes(OutName);
1350   OutStreamer->emitZeros(ExtraZeros);
1351 }
1352 
1353 void SystemZAsmPrinter::emitPPA1(MCSymbol *FnEndSym) {
1354   assert(PPA2Sym != nullptr && "PPA2 Symbol not defined");
1355 
1356   const TargetRegisterInfo *TRI = MF->getRegInfo().getTargetRegisterInfo();
1357   const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
1358   const auto TargetHasVector = Subtarget.hasVector();
1359 
1360   const SystemZMachineFunctionInfo *ZFI =
1361       MF->getInfo<SystemZMachineFunctionInfo>();
1362   const auto *ZFL = static_cast<const SystemZXPLINKFrameLowering *>(
1363       Subtarget.getFrameLowering());
1364   const MachineFrameInfo &MFFrame = MF->getFrameInfo();
1365 
1366   // Get saved GPR/FPR/VPR masks.
1367   const std::vector<CalleeSavedInfo> &CSI = MFFrame.getCalleeSavedInfo();
1368   uint16_t SavedGPRMask = 0;
1369   uint16_t SavedFPRMask = 0;
1370   uint8_t SavedVRMask = 0;
1371   int64_t OffsetFPR = 0;
1372   int64_t OffsetVR = 0;
1373   const int64_t TopOfStack =
1374       MFFrame.getOffsetAdjustment() + MFFrame.getStackSize();
1375 
1376   // Loop over the spilled registers. The CalleeSavedInfo can't be used because
1377   // it does not contain all spilled registers.
1378   for (unsigned I = ZFI->getSpillGPRRegs().LowGPR,
1379                 E = ZFI->getSpillGPRRegs().HighGPR;
1380        I && E && I <= E; ++I) {
1381     unsigned V = TRI->getEncodingValue((Register)I);
1382     assert(V < 16 && "GPR index out of range");
1383     SavedGPRMask |= 1 << (15 - V);
1384   }
1385 
1386   for (auto &CS : CSI) {
1387     unsigned Reg = CS.getReg();
1388     unsigned I = TRI->getEncodingValue(Reg);
1389 
1390     if (SystemZ::FP64BitRegClass.contains(Reg)) {
1391       assert(I < 16 && "FPR index out of range");
1392       SavedFPRMask |= 1 << (15 - I);
1393       int64_t Temp = MFFrame.getObjectOffset(CS.getFrameIdx());
1394       if (Temp < OffsetFPR)
1395         OffsetFPR = Temp;
1396     } else if (SystemZ::VR128BitRegClass.contains(Reg)) {
1397       assert(I >= 16 && I <= 23 && "VPR index out of range");
1398       unsigned BitNum = I - 16;
1399       SavedVRMask |= 1 << (7 - BitNum);
1400       int64_t Temp = MFFrame.getObjectOffset(CS.getFrameIdx());
1401       if (Temp < OffsetVR)
1402         OffsetVR = Temp;
1403     }
1404   }
1405 
1406   // Adjust the offset.
1407   OffsetFPR += (OffsetFPR < 0) ? TopOfStack : 0;
1408   OffsetVR += (OffsetVR < 0) ? TopOfStack : 0;
1409 
1410   // Get alloca register.
1411   uint8_t FrameReg = TRI->getEncodingValue(TRI->getFrameRegister(*MF));
1412   uint8_t AllocaReg = ZFL->hasFP(*MF) ? FrameReg : 0;
1413   assert(AllocaReg < 16 && "Can't have alloca register larger than 15");
1414   (void)AllocaReg;
1415 
1416   // Build FPR save area offset.
1417   uint32_t FrameAndFPROffset = 0;
1418   if (SavedFPRMask) {
1419     uint64_t FPRSaveAreaOffset = OffsetFPR;
1420     assert(FPRSaveAreaOffset < 0x10000000 && "Offset out of range");
1421 
1422     FrameAndFPROffset = FPRSaveAreaOffset & 0x0FFFFFFF; // Lose top 4 bits.
1423     FrameAndFPROffset |= FrameReg << 28;                // Put into top 4 bits.
1424   }
1425 
1426   // Build VR save area offset.
1427   uint32_t FrameAndVROffset = 0;
1428   if (TargetHasVector && SavedVRMask) {
1429     uint64_t VRSaveAreaOffset = OffsetVR;
1430     assert(VRSaveAreaOffset < 0x10000000 && "Offset out of range");
1431 
1432     FrameAndVROffset = VRSaveAreaOffset & 0x0FFFFFFF; // Lose top 4 bits.
1433     FrameAndVROffset |= FrameReg << 28;               // Put into top 4 bits.
1434   }
1435 
1436   // Emit PPA1 section.
1437   OutStreamer->AddComment("PPA1");
1438   OutStreamer->emitLabel(CurrentFnPPA1Sym);
1439   OutStreamer->AddComment("Version");
1440   OutStreamer->emitInt8(0x02); // Version.
1441   OutStreamer->AddComment("LE Signature X'CE'");
1442   OutStreamer->emitInt8(0xCE); // CEL signature.
1443   OutStreamer->AddComment("Saved GPR Mask");
1444   OutStreamer->emitInt16(SavedGPRMask);
1445   OutStreamer->AddComment("Offset to PPA2");
1446   OutStreamer->emitAbsoluteSymbolDiff(PPA2Sym, CurrentFnPPA1Sym, 4);
1447 
1448   bool NeedEmitEHBlock = !MF->getLandingPads().empty();
1449 
1450   bool HasName =
1451       MF->getFunction().hasName() && MF->getFunction().getName().size() > 0;
1452 
1453   emitPPA1Flags(OutStreamer, MF->getFunction().isVarArg(),
1454                 MFFrame.hasStackProtectorIndex(), SavedFPRMask != 0,
1455                 TargetHasVector && SavedVRMask != 0, NeedEmitEHBlock, HasName);
1456 
1457   OutStreamer->AddComment("Length/4 of Parms");
1458   OutStreamer->emitInt16(
1459       static_cast<uint16_t>(ZFI->getSizeOfFnParams() / 4)); // Parms/4.
1460   OutStreamer->AddComment("Length of Code");
1461   OutStreamer->emitAbsoluteSymbolDiff(FnEndSym, CurrentFnEPMarkerSym, 4);
1462 
1463   // Emit saved FPR mask and offset to FPR save area (0x20 of flags 3).
1464   if (SavedFPRMask) {
1465     OutStreamer->AddComment("FPR mask");
1466     OutStreamer->emitInt16(SavedFPRMask);
1467     OutStreamer->AddComment("AR mask");
1468     OutStreamer->emitInt16(0); // AR Mask, unused currently.
1469     OutStreamer->AddComment("FPR Save Area Locator");
1470     OutStreamer->AddComment(Twine("  Bit 0-3: Register R")
1471                                 .concat(utostr(FrameAndFPROffset >> 28))
1472                                 .str());
1473     OutStreamer->AddComment(Twine("  Bit 4-31: Offset ")
1474                                 .concat(utostr(FrameAndFPROffset & 0x0FFFFFFF))
1475                                 .str());
1476     OutStreamer->emitInt32(FrameAndFPROffset); // Offset to FPR save area with
1477                                                // register to add value to
1478                                                // (alloca reg).
1479   }
1480 
1481   // Emit saved VR mask to VR save area.
1482   if (TargetHasVector && SavedVRMask) {
1483     OutStreamer->AddComment("VR mask");
1484     OutStreamer->emitInt8(SavedVRMask);
1485     OutStreamer->emitInt8(0);  // Reserved.
1486     OutStreamer->emitInt16(0); // Also reserved.
1487     OutStreamer->AddComment("VR Save Area Locator");
1488     OutStreamer->AddComment(Twine("  Bit 0-3: Register R")
1489                                 .concat(utostr(FrameAndVROffset >> 28))
1490                                 .str());
1491     OutStreamer->AddComment(Twine("  Bit 4-31: Offset ")
1492                                 .concat(utostr(FrameAndVROffset & 0x0FFFFFFF))
1493                                 .str());
1494     OutStreamer->emitInt32(FrameAndVROffset);
1495   }
1496 
1497   // Emit C++ EH information block
1498   const Function *Per = nullptr;
1499   if (NeedEmitEHBlock) {
1500     Per = dyn_cast<Function>(
1501         MF->getFunction().getPersonalityFn()->stripPointerCasts());
1502     MCSymbol *PersonalityRoutine =
1503         Per ? MF->getTarget().getSymbol(Per) : nullptr;
1504     assert(PersonalityRoutine && "Missing personality routine");
1505 
1506     OutStreamer->AddComment("Version");
1507     OutStreamer->emitInt32(1);
1508     OutStreamer->AddComment("Flags");
1509     OutStreamer->emitInt32(0); // LSDA field is a WAS offset
1510     OutStreamer->AddComment("Personality routine");
1511     OutStreamer->emitInt64(ADATable.insert(
1512         PersonalityRoutine, SystemZII::MO_ADA_INDIRECT_FUNC_DESC));
1513     OutStreamer->AddComment("LSDA location");
1514     MCSymbol *GCCEH = MF->getContext().getOrCreateSymbol(
1515         Twine("GCC_except_table") + Twine(MF->getFunctionNumber()));
1516     OutStreamer->emitInt64(
1517         ADATable.insert(GCCEH, SystemZII::MO_ADA_DATA_SYMBOL_ADDR));
1518   }
1519 
1520   // Emit name length and name optional section (0x01 of flags 4)
1521   if (HasName)
1522     emitPPA1Name(OutStreamer, MF->getFunction().getName());
1523 
1524   // Emit offset to entry point optional section (0x80 of flags 4).
1525   OutStreamer->emitAbsoluteSymbolDiff(CurrentFnEPMarkerSym, CurrentFnPPA1Sym,
1526                                       4);
1527 }
1528 
1529 void SystemZAsmPrinter::emitStartOfAsmFile(Module &M) {
1530   if (TM.getTargetTriple().isOSzOS())
1531     emitPPA2(M);
1532   AsmPrinter::emitStartOfAsmFile(M);
1533 }
1534 
1535 void SystemZAsmPrinter::emitPPA2(Module &M) {
1536   OutStreamer->pushSection();
1537   OutStreamer->switchSection(getObjFileLowering().getPPA2Section());
1538   MCContext &OutContext = OutStreamer->getContext();
1539   // Make CELQSTRT symbol.
1540   const char *StartSymbolName = "CELQSTRT";
1541   MCSymbol *CELQSTRT = OutContext.getOrCreateSymbol(StartSymbolName);
1542 
1543   // Create symbol and assign to class field for use in PPA1.
1544   PPA2Sym = OutContext.createTempSymbol("PPA2", false);
1545   MCSymbol *DateVersionSym = OutContext.createTempSymbol("DVS", false);
1546 
1547   std::time_t Time = getTranslationTime(M);
1548   SmallString<15> CompilationTime; // 14 + null
1549   raw_svector_ostream O(CompilationTime);
1550   O << formatv("{0:%Y%m%d%H%M%S}", llvm::sys::toUtcTime(Time));
1551 
1552   uint32_t ProductVersion = getProductVersion(M),
1553            ProductRelease = getProductRelease(M),
1554            ProductPatch = getProductPatch(M);
1555 
1556   SmallString<7> Version; // 6 + null
1557   raw_svector_ostream ostr(Version);
1558   ostr << formatv("{0,0-2:d}{1,0-2:d}{2,0-2:d}", ProductVersion, ProductRelease,
1559                   ProductPatch);
1560 
1561   // Drop 0 during conversion.
1562   SmallString<sizeof(CompilationTime) - 1> CompilationTimeStr;
1563   SmallString<sizeof(Version) - 1> VersionStr;
1564 
1565   ConverterEBCDIC::convertToEBCDIC(CompilationTime, CompilationTimeStr);
1566   ConverterEBCDIC::convertToEBCDIC(Version, VersionStr);
1567 
1568   enum class PPA2MemberId : uint8_t {
1569     // See z/OS Language Environment Vendor Interfaces v2r5, p.23, for
1570     // complete list. Only the C runtime is supported by this backend.
1571     LE_C_Runtime = 3,
1572   };
1573   enum class PPA2MemberSubId : uint8_t {
1574     // List of languages using the LE C runtime implementation.
1575     C = 0x00,
1576     CXX = 0x01,
1577     Swift = 0x03,
1578     Go = 0x60,
1579     LLVMBasedLang = 0xe7,
1580   };
1581   // PPA2 Flags
1582   enum class PPA2Flags : uint8_t {
1583     CompileForBinaryFloatingPoint = 0x80,
1584     CompiledWithXPLink = 0x01,
1585     CompiledUnitASCII = 0x04,
1586     HasServiceInfo = 0x20,
1587   };
1588 
1589   PPA2MemberSubId MemberSubId = PPA2MemberSubId::LLVMBasedLang;
1590   if (auto *MD = M.getModuleFlag("zos_cu_language")) {
1591     StringRef Language = cast<MDString>(MD)->getString();
1592     MemberSubId = StringSwitch<PPA2MemberSubId>(Language)
1593                       .Case("C", PPA2MemberSubId::C)
1594                       .Case("C++", PPA2MemberSubId::CXX)
1595                       .Case("Swift", PPA2MemberSubId::Swift)
1596                       .Case("Go", PPA2MemberSubId::Go)
1597                       .Default(PPA2MemberSubId::LLVMBasedLang);
1598   }
1599 
1600   // Emit PPA2 section.
1601   OutStreamer->emitLabel(PPA2Sym);
1602   OutStreamer->emitInt8(static_cast<uint8_t>(PPA2MemberId::LE_C_Runtime));
1603   OutStreamer->emitInt8(static_cast<uint8_t>(MemberSubId));
1604   OutStreamer->emitInt8(0x22); // Member defined, c370_plist+c370_env
1605   OutStreamer->emitInt8(0x04); // Control level 4 (XPLink)
1606   OutStreamer->emitAbsoluteSymbolDiff(CELQSTRT, PPA2Sym, 4);
1607   OutStreamer->emitInt32(0x00000000);
1608   OutStreamer->emitAbsoluteSymbolDiff(DateVersionSym, PPA2Sym, 4);
1609   OutStreamer->emitInt32(
1610       0x00000000); // Offset to main entry point, always 0 (so says TR).
1611   uint8_t Flgs = static_cast<uint8_t>(PPA2Flags::CompileForBinaryFloatingPoint);
1612   Flgs |= static_cast<uint8_t>(PPA2Flags::CompiledWithXPLink);
1613 
1614   if (auto *MD = M.getModuleFlag("zos_le_char_mode")) {
1615     const StringRef &CharMode = cast<MDString>(MD)->getString();
1616     if (CharMode == "ascii") {
1617       Flgs |= static_cast<uint8_t>(
1618           PPA2Flags::CompiledUnitASCII); // Setting bit for ASCII char. mode.
1619     } else if (CharMode != "ebcdic") {
1620       report_fatal_error(
1621           "Only ascii or ebcdic are valid values for zos_le_char_mode "
1622           "metadata");
1623     }
1624   }
1625 
1626   OutStreamer->emitInt8(Flgs);
1627   OutStreamer->emitInt8(0x00);    // Reserved.
1628                                   // No MD5 signature before timestamp.
1629                                   // No FLOAT(AFP(VOLATILE)).
1630                                   // Remaining 5 flag bits reserved.
1631   OutStreamer->emitInt16(0x0000); // 16 Reserved flag bits.
1632 
1633   // Emit date and version section.
1634   OutStreamer->emitLabel(DateVersionSym);
1635   OutStreamer->emitBytes(CompilationTimeStr.str());
1636   OutStreamer->emitBytes(VersionStr.str());
1637 
1638   OutStreamer->emitInt16(0x0000); // Service level string length.
1639 
1640   // The binder requires that the offset to the PPA2 be emitted in a different,
1641   // specially-named section.
1642   OutStreamer->switchSection(getObjFileLowering().getPPA2ListSection());
1643   // Emit 8 byte alignment.
1644   // Emit pointer to PPA2 label.
1645   OutStreamer->AddComment("A(PPA2-CELQSTRT)");
1646   OutStreamer->emitAbsoluteSymbolDiff(PPA2Sym, CELQSTRT, 8);
1647   OutStreamer->popSection();
1648 }
1649 
1650 void SystemZAsmPrinter::emitFunctionEntryLabel() {
1651   const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
1652 
1653   if (Subtarget.getTargetTriple().isOSzOS()) {
1654     MCContext &OutContext = OutStreamer->getContext();
1655 
1656     // Save information for later use.
1657     std::string N(MF->getFunction().hasName()
1658                       ? Twine(MF->getFunction().getName()).concat("_").str()
1659                       : "");
1660 
1661     CurrentFnEPMarkerSym =
1662         OutContext.createTempSymbol(Twine("EPM_").concat(N).str(), true);
1663     CurrentFnPPA1Sym =
1664         OutContext.createTempSymbol(Twine("PPA1_").concat(N).str(), true);
1665 
1666     // EntryPoint Marker
1667     const MachineFrameInfo &MFFrame = MF->getFrameInfo();
1668     bool IsUsingAlloca = MFFrame.hasVarSizedObjects();
1669     uint32_t DSASize = MFFrame.getStackSize();
1670     bool IsLeaf = DSASize == 0 && MFFrame.getCalleeSavedInfo().empty();
1671 
1672     // Set Flags.
1673     uint8_t Flags = 0;
1674     if (IsLeaf)
1675       Flags |= 0x08;
1676     if (IsUsingAlloca)
1677       Flags |= 0x04;
1678 
1679     // Combine into top 27 bits of DSASize and bottom 5 bits of Flags.
1680     uint32_t DSAAndFlags = DSASize & 0xFFFFFFE0; // (x/32) << 5
1681     DSAAndFlags |= Flags;
1682 
1683     // Emit entry point marker section.
1684     OutStreamer->AddComment("XPLINK Routine Layout Entry");
1685     OutStreamer->emitLabel(CurrentFnEPMarkerSym);
1686     OutStreamer->AddComment("Eyecatcher 0x00C300C500C500");
1687     OutStreamer->emitIntValueInHex(0x00C300C500C500, 7); // Eyecatcher.
1688     OutStreamer->AddComment("Mark Type C'1'");
1689     OutStreamer->emitInt8(0xF1); // Mark Type.
1690     OutStreamer->AddComment("Offset to PPA1");
1691     OutStreamer->emitAbsoluteSymbolDiff(CurrentFnPPA1Sym, CurrentFnEPMarkerSym,
1692                                         4);
1693     if (OutStreamer->isVerboseAsm()) {
1694       OutStreamer->AddComment("DSA Size 0x" + Twine::utohexstr(DSASize));
1695       OutStreamer->AddComment("Entry Flags");
1696       if (Flags & 0x08)
1697         OutStreamer->AddComment("  Bit 1: 1 = Leaf function");
1698       else
1699         OutStreamer->AddComment("  Bit 1: 0 = Non-leaf function");
1700       if (Flags & 0x04)
1701         OutStreamer->AddComment("  Bit 2: 1 = Uses alloca");
1702       else
1703         OutStreamer->AddComment("  Bit 2: 0 = Does not use alloca");
1704     }
1705     OutStreamer->emitInt32(DSAAndFlags);
1706   }
1707 
1708   AsmPrinter::emitFunctionEntryLabel();
1709 }
1710 
1711 // Force static initialization.
1712 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZAsmPrinter() {
1713   RegisterAsmPrinter<SystemZAsmPrinter> X(getTheSystemZTarget());
1714 }
1715