1 /* $NetBSD: wii.h,v 1.9 2024/10/13 16:21:36 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2024 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Nintendo Wii platform definitions. 31 */ 32 33 #ifndef _WII_H 34 #define _WII_H 35 36 #include <powerpc/pio.h> 37 38 #define WII_MEM1_BASE 0x00000000 39 #define WII_MEM1_SIZE 0x01800000 /* 24 MB */ 40 #define WII_MEM2_BASE 0x10000000 41 #define WII_MEM2_SIZE 0x04000000 /* 64 MB */ 42 43 #define WII_IOMEM_BASE 0x0c000000 44 45 #define GLOBAL_BASE 0x00000000 46 #define GLOBAL_SIZE 0x00003400 47 48 #define BROADWAY_BASE 0x0c000000 49 #define BROADWAY_SIZE 0x00000004 50 51 #define VI_BASE 0x0c002000 52 #define VI_SIZE 0x00000100 53 54 #define PI_BASE 0x0c003000 55 #define PI_SIZE 0x00000100 56 57 #define DSP_BASE 0x0c005000 58 #define DSP_SIZE 0x00000200 59 60 #define EXI_BASE 0x0d006800 61 #define EXI_SIZE 0x00000080 62 63 #define AI_BASE 0x0d006c00 64 #define AI_SIZE 0x00000020 65 66 #define HOLLYWOOD_BASE 0x0d000000 67 #define HOLLYWOOD_PRIV_BASE 0x0d800000 68 #define HOLLYWOOD_SIZE 0x00008000 69 70 #define XFB_START 0x01698000 71 #define XFB_SIZE 0x00168000 72 73 #define DSP_MEM_START 0x10000000 74 #define DSP_MEM_SIZE 0x00004000 75 76 #define IPC_START 0x133e0000 77 #define IPC_SIZE 0x00020000 78 79 #define ARM_START 0x13400000 80 #define ARM_SIZE 0x00c00000 81 82 #define BUS_FREQ_HZ 243000000 83 #define CPU_FREQ_HZ (BUS_FREQ_HZ * 3) 84 #define TIMEBASE_FREQ_HZ (BUS_FREQ_HZ / 4) 85 86 /* Global memory structure */ 87 #define GLOBAL_MEM1_SIZE (GLOBAL_BASE + 0x0028) 88 #define GLOBAL_CUR_VID_MODE (GLOBAL_BASE + 0x00cc) 89 #define GLOBAL_BUS_SPEED (GLOBAL_BASE + 0x00f8) 90 #define GLOBAL_CPU_SPEED (GLOBAL_BASE + 0x00fc) 91 #define GLOBAL_SYSTEM_TIME (GLOBAL_BASE + 0x30d8) 92 #define GLOBAL_MEM2_SIZE (GLOBAL_BASE + 0x3118) 93 #define GLOBAL_MEM2_AVAIL_START (GLOBAL_BASE + 0x3124) 94 #define GLOBAL_MEM2_AVAIL_END (GLOBAL_BASE + 0x3128) 95 #define GLOBAL_IOS_VERSION (GLOBAL_BASE + 0x3140) 96 97 /* Processor interface registers */ 98 #define PI_INTSR (PI_BASE + 0x00) 99 #define PI_INTMR (PI_BASE + 0x04) 100 101 /* Processor IRQs */ 102 #define PI_IRQ_EXI 4 103 #define PI_IRQ_AI 5 104 #define PI_IRQ_DSP 6 105 #define PI_IRQ_HOLLYWOOD 14 106 107 /* Hollywood registers */ 108 #define HW_VIDIM (HOLLYWOOD_PRIV_BASE + 0x01c) 109 #define VIDIM_E __BIT(7) 110 #define VIDIM_Y __BITS(5,3) 111 #define VIDIM_C __BITS(2,0) 112 #define HW_PPCIRQFLAGS (HOLLYWOOD_BASE + 0x030) 113 #define HW_PPCIRQMASK (HOLLYWOOD_BASE + 0x034) 114 #define HW_ARMIRQFLAGS (HOLLYWOOD_PRIV_BASE + 0x038) 115 #define HW_ARMIRQMASK (HOLLYWOOD_PRIV_BASE + 0x03c) 116 #define HW_AHBPROT (HOLLYWOOD_PRIV_BASE + 0x064) 117 #define IOPSD1EN __BIT(24) 118 #define IOPSD0EN __BIT(23) 119 #define IOPOH1EN __BIT(22) 120 #define IOPOH0EN __BIT(21) 121 #define IOPEHCEN __BIT(20) 122 #define HW_AIPPROT (HOLLYWOOD_PRIV_BASE + 0x070) 123 #define ENAHBIOPI __BIT(0) 124 #define HW_GPIOB_OUT (HOLLYWOOD_BASE + 0x0c0) 125 #define HW_GPIOB_DIR (HOLLYWOOD_BASE + 0x0c4) 126 #define HW_GPIOB_IN (HOLLYWOOD_BASE + 0x0c8) 127 #define HW_GPIO_OWNER (HOLLYWOOD_PRIV_BASE + 0x0fc) 128 #define HW_RESETS (HOLLYWOOD_PRIV_BASE + 0x194) 129 #define RSTB_IOP __BIT(23) 130 #define RSTBINB __BIT(0) 131 #define HW_VERSION (HOLLYWOOD_BASE + 0x214) 132 #define HWVER_MASK __BITS(7,4) 133 #define HWREV_MASK __BITS(3,0) 134 135 /* GPIOs */ 136 #define GPIO_SHUTDOWN 1 137 #define GPIO_SLOT_LED 5 138 139 /* Command line protocol */ 140 #define WII_ARGV_MAGIC 0x5f617267 141 struct wii_argv { 142 uint32_t magic; 143 uint32_t cmdline; 144 uint32_t length; 145 uint32_t unused[3]; 146 }; 147 148 /* Blink the slot LED forever at the specified interval. */ 149 static inline void __dead 150 wii_slot_led_blink(u_int interval_us) 151 { 152 uint32_t val; 153 154 for (val = in32(HW_GPIOB_OUT); ; val ^= __BIT(GPIO_SLOT_LED)) { 155 delay(interval_us); 156 out32(HW_GPIOB_OUT, val); 157 } 158 } 159 160 /* Enable or disable the slot LED. */ 161 static inline void 162 wii_slot_led(bool enable) 163 { 164 uint32_t val; 165 166 val = in32(HW_GPIOB_OUT); 167 if (enable) { 168 val |= __BIT(GPIO_SLOT_LED); 169 } else { 170 val &= ~__BIT(GPIO_SLOT_LED); 171 } 172 out32(HW_GPIOB_OUT, val); 173 } 174 175 #endif /* !_WII_H */ 176