1 /* $NetBSD: ascreg.h,v 1.3 2025/01/13 16:23:48 riastradh Exp $ */ 2 3 /*- 4 * Copyright (c) 2017, 2023 Nathanial Sloss <nathanialsloss@yahoo.com.au> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #ifndef _SYS_ARCH_MAC68K_OBIO_ASCREG_H 30 #define _SYS_ARCH_MAC68K_OBIO_ASCREG_H 31 32 #define ASCIRQ 5 33 34 #define FIFO_A 0 35 #define FIFO_B 0x400 36 #define FIFO_A_ALT 0x1000 37 #define FIFO_B_ALT 0x1800 38 #define FIFO_LEN 0x400 39 40 #define VERLOC 0x800 41 42 #define ASCMODE 0x801 43 #define MODESTOP 0 44 #define MODEFIFO 1 45 #define MODEWAVE 2 /* not in easc */ 46 47 #define ASCTRL 0x802 48 #define UNDERRUN __BIT(7) 49 #define STEREO __BIT(1) 50 #define ANAPWM __BIT(0) 51 52 #define FIFOPARAM 0x803 53 #define CLEARFIFO __BIT(7) 54 #define NONCOMP __BIT(1) 55 #define ROMCOMP __BIT(0) 56 57 #define FIFOSTATUS 0x804 58 #define A_HALF __BIT(0) 59 #define A_FULL __BIT(1) 60 #define B_HALF __BIT(2) 61 #define B_FULL __BIT(3) 62 63 #define INTVOL 0x806 /* b2-b4 Int volume. b5-b7 ext. */ 64 65 #define ASCRATE 0x807 66 #define MACFREQ 0 /* 22254 Hz */ 67 #define F22KHZ 2 /* 22050 Hz */ 68 #define F44KHZ 3 /* 44100 Hz */ 69 70 #define APLAYREC 0x80a 71 #define RECORDA __BIT(0) 72 #define REC22KHZ __BIT(1) 73 74 #define ASCTEST 0x80f 75 76 #define A_WRITEPTRHI 0xf00 77 #define A_WRITEPTRLO 0xf01 78 #define A_READPTRHI 0xf02 79 #define A_READPTRLO 0xf03 80 #define B_WRITEPTRHI 0xf20 81 #define B_WRITEPTRLO 0xf21 82 #define B_READPTRHI 0xf22 83 #define B_READPTRLO 0xf23 84 85 #define MACOS_HIGH_VOL 0x36 /* Should NOT exceed this value */ 86 87 #define A_LEFT_VOL 0xf06 88 #define A_RIGHT_VOL 0xf07 89 #define B_LEFT_VOL 0xf26 90 #define B_RIGHT_VOL 0xf27 91 92 #define FIFOCTRLA 0xf08 93 #define FIFOCTRLB 0xf28 94 #define CDQUALITY 0x81 95 #define MACDEFAULTS 0x80 96 97 #define IRQA 0xf09 98 #define IRQB 0xf29 99 #define DISABLEHALFIRQ __BIT(0) 100 101 #endif /* !_SYS_ARCH_MAC68K_OBIO_ASCREG_H */ 102