1 /* $OpenBSD: cpu.h,v 1.179 2024/10/22 10:14:49 jsg Exp $ */ 2 /* $NetBSD: cpu.h,v 1.1 2003/04/26 18:39:39 fvdl Exp $ */ 3 4 /*- 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 #ifndef _MACHINE_CPU_H_ 39 #define _MACHINE_CPU_H_ 40 41 /* 42 * Definitions unique to x86-64 cpu support. 43 */ 44 #ifdef _KERNEL 45 #include <machine/frame.h> 46 #include <machine/segments.h> /* USERMODE */ 47 #include <machine/intrdefs.h> 48 #endif /* _KERNEL */ 49 50 #include <sys/clockintr.h> 51 #include <sys/device.h> 52 #include <sys/rwlock.h> 53 #include <sys/sched.h> 54 #include <sys/sensors.h> 55 #include <sys/srp.h> 56 #include <uvm/uvm_percpu.h> 57 58 #ifdef _KERNEL 59 60 /* VMXON region (Intel) */ 61 struct vmxon_region { 62 uint32_t vr_revision; 63 }; 64 65 /* 66 * VMX for Intel CPUs 67 */ 68 struct vmx { 69 uint64_t vmx_cr0_fixed0; 70 uint64_t vmx_cr0_fixed1; 71 uint64_t vmx_cr4_fixed0; 72 uint64_t vmx_cr4_fixed1; 73 uint32_t vmx_vmxon_revision; 74 uint32_t vmx_msr_table_size; 75 uint32_t vmx_cr3_tgt_count; 76 uint8_t vmx_has_l1_flush_msr; 77 uint64_t vmx_invept_mode; 78 }; 79 80 /* 81 * SVM for AMD CPUs 82 */ 83 struct svm { 84 uint32_t svm_max_asid; 85 uint8_t svm_flush_by_asid; 86 uint8_t svm_vmcb_clean; 87 uint8_t svm_decode_assist; 88 }; 89 90 union vmm_cpu_cap { 91 struct vmx vcc_vmx; 92 struct svm vcc_svm; 93 }; 94 95 enum cpu_vendor { 96 CPUV_UNKNOWN, 97 CPUV_AMD, 98 CPUV_INTEL, 99 CPUV_VIA, 100 }; 101 102 /* 103 * Locks used to protect struct members in this file: 104 * I immutable after creation 105 * a atomic operations 106 * o owned (read/modified only) by this CPU 107 */ 108 struct x86_64_tss; 109 struct vcpu; 110 struct cpu_info { 111 /* 112 * The beginning of this structure in mapped in the userspace "u-k" 113 * page tables, so that these first couple members can be accessed 114 * from the trampoline code. The ci_PAGEALIGN member defines where 115 * the part that is *not* visible begins, so don't put anything 116 * above it that must be kept hidden from userspace! 117 */ 118 u_int64_t ci_kern_cr3; /* [o] U+K page table */ 119 u_int64_t ci_scratch; /* [o] for U<-->K transition */ 120 121 #define ci_PAGEALIGN ci_dev 122 struct device *ci_dev; /* [I] */ 123 struct cpu_info *ci_self; /* [I] */ 124 struct cpu_info *ci_next; /* [I] */ 125 126 u_int ci_cpuid; /* [I] */ 127 u_int ci_apicid; /* [I] */ 128 u_int ci_acpi_proc_id; /* [I] */ 129 u_int32_t ci_randseed; /* [o] */ 130 131 u_int64_t ci_kern_rsp; /* [o] kernel-only stack */ 132 u_int64_t ci_intr_rsp; /* [o] U<-->K trampoline stack */ 133 u_int64_t ci_user_cr3; /* [o] U-K page table */ 134 135 /* bits for mitigating Micro-architectural Data Sampling */ 136 char ci_mds_tmp[64]; /* [o] 64-byte aligned */ 137 void *ci_mds_buf; /* [I] */ 138 139 struct proc *ci_curproc; /* [o] */ 140 struct schedstate_percpu ci_schedstate; /* scheduler state */ 141 142 struct pmap *ci_proc_pmap; /* active, non-kernel pmap */ 143 struct pmap *ci_user_pmap; /* [o] last pmap used in userspace */ 144 struct pcb *ci_curpcb; /* [o] */ 145 struct pcb *ci_idle_pcb; /* [o] */ 146 147 u_int ci_pflags; /* [o] */ 148 #define CPUPF_USERSEGS 0x01 /* CPU has curproc's segs and FS.base */ 149 #define CPUPF_USERXSTATE 0x02 /* CPU has curproc's xsave state */ 150 151 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 152 u_int64_t ci_ipending; 153 int ci_ilevel; 154 int ci_idepth; 155 int ci_handled_intr_level; 156 u_int64_t ci_imask[NIPL]; 157 u_int64_t ci_iunmask[NIPL]; 158 #ifdef DIAGNOSTIC 159 int ci_mutex_level; 160 #endif 161 162 volatile u_int ci_flags; /* [a] */ 163 u_int32_t ci_ipis; /* [a] */ 164 165 enum cpu_vendor ci_vendor; /* [I] mapped from cpuid(0) */ 166 u_int32_t ci_cpuid_level; /* [I] cpuid(0).eax */ 167 u_int32_t ci_feature_flags; /* [I] */ 168 u_int32_t ci_feature_eflags; /* [I] */ 169 u_int32_t ci_feature_sefflags_ebx;/* [I] */ 170 u_int32_t ci_feature_sefflags_ecx;/* [I] */ 171 u_int32_t ci_feature_sefflags_edx;/* [I] */ 172 u_int32_t ci_feature_amdspec_ebx; /* [I] */ 173 u_int32_t ci_feature_amdsev_eax; /* [I] */ 174 u_int32_t ci_feature_amdsev_ebx; /* [I] */ 175 u_int32_t ci_feature_amdsev_ecx; /* [I] */ 176 u_int32_t ci_feature_amdsev_edx; /* [I] */ 177 u_int32_t ci_feature_tpmflags; /* [I] */ 178 u_int32_t ci_pnfeatset; /* [I] */ 179 u_int32_t ci_efeature_eax; /* [I] */ 180 u_int32_t ci_efeature_ecx; /* [I] */ 181 u_int32_t ci_brand[12]; /* [I] */ 182 u_int32_t ci_signature; /* [I] */ 183 u_int32_t ci_family; /* [I] */ 184 u_int32_t ci_model; /* [I] */ 185 u_int32_t ci_cflushsz; /* [I] */ 186 187 int ci_inatomic; /* [o] */ 188 189 #define __HAVE_CPU_TOPOLOGY 190 u_int32_t ci_smt_id; /* [I] */ 191 u_int32_t ci_core_id; /* [I] */ 192 u_int32_t ci_pkg_id; /* [I] */ 193 194 struct cpu_functions *ci_func; /* [I] */ 195 void (*cpu_setup)(struct cpu_info *); /* [I] */ 196 197 struct device *ci_acpicpudev; /* [I] */ 198 volatile u_int ci_mwait; /* [a] */ 199 #define MWAIT_IN_IDLE 0x1 /* don't need IPI to wake */ 200 #define MWAIT_KEEP_IDLING 0x2 /* cleared by other cpus to wake me */ 201 #define MWAIT_ONLY 0x4 /* set if all idle states use mwait */ 202 #define MWAIT_IDLING (MWAIT_IN_IDLE | MWAIT_KEEP_IDLING) 203 204 int ci_want_resched; 205 206 struct x86_64_tss *ci_tss; /* [o] */ 207 void *ci_gdt; /* [o] */ 208 209 volatile int ci_ddb_paused; 210 #define CI_DDB_RUNNING 0 211 #define CI_DDB_SHOULDSTOP 1 212 #define CI_DDB_STOPPED 2 213 #define CI_DDB_ENTERDDB 3 214 #define CI_DDB_INDDB 4 215 216 #ifdef MULTIPROCESSOR 217 struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM]; 218 #define __HAVE_UVM_PERCPU 219 struct uvm_pmr_cache ci_uvm; /* [o] page cache */ 220 #endif 221 222 struct ksensordev ci_sensordev; 223 struct ksensor ci_sensor; 224 struct ksensor ci_hz_sensor; 225 u_int64_t ci_hz_mperf; 226 u_int64_t ci_hz_aperf; 227 #if defined(GPROF) || defined(DDBPROF) 228 struct gmonparam *ci_gmon; 229 struct clockintr ci_gmonclock; 230 #endif 231 u_int32_t ci_vmm_flags; 232 #define CI_VMM_VMX (1 << 0) 233 #define CI_VMM_SVM (1 << 1) 234 #define CI_VMM_RVI (1 << 2) 235 #define CI_VMM_EPT (1 << 3) 236 #define CI_VMM_DIS (1 << 4) 237 union vmm_cpu_cap ci_vmm_cap; 238 paddr_t ci_vmxon_region_pa; 239 struct vmxon_region *ci_vmxon_region; 240 paddr_t ci_vmcs_pa; 241 struct rwlock ci_vmcs_lock; 242 struct pmap *ci_ept_pmap; /* [o] last used EPT pmap */ 243 struct vcpu *ci_guest_vcpu; /* [o] last vcpu resumed */ 244 245 char ci_panicbuf[512]; 246 247 struct clockqueue ci_queue; 248 }; 249 250 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 251 #define CPUF_AP 0x0002 /* CPU is an AP */ 252 #define CPUF_SP 0x0004 /* CPU is only processor */ 253 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 254 255 #define CPUF_IDENTIFY 0x0010 /* CPU may now identify */ 256 #define CPUF_IDENTIFIED 0x0020 /* CPU has been identified */ 257 258 #define CPUF_CONST_TSC 0x0040 /* CPU has constant TSC */ 259 #define CPUF_INVAR_TSC 0x0100 /* CPU has invariant TSC */ 260 261 #define CPUF_PRESENT 0x1000 /* CPU is present */ 262 #define CPUF_RUNNING 0x2000 /* CPU is running */ 263 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 264 #define CPUF_GO 0x8000 /* CPU should start running */ 265 #define CPUF_PARK 0x10000 /* CPU should self-park in real mode */ 266 #define CPUF_VMM 0x20000 /* CPU is executing in VMM mode */ 267 268 #define PROC_PC(p) ((p)->p_md.md_regs->tf_rip) 269 #define PROC_STACK(p) ((p)->p_md.md_regs->tf_rsp) 270 271 struct cpu_info_full; 272 extern struct cpu_info_full cpu_info_full_primary; 273 #define cpu_info_primary (*(struct cpu_info *)((char *)&cpu_info_full_primary + 4096*2 - offsetof(struct cpu_info, ci_PAGEALIGN))) 274 275 extern struct cpu_info *cpu_info_list; 276 277 #define CPU_INFO_ITERATOR int 278 #define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \ 279 ci != NULL; ci = ci->ci_next) 280 281 #define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0) 282 283 /* 284 * Preempt the current process if in interrupt from user mode, 285 * or after the current trap/syscall if in system mode. 286 */ 287 extern void need_resched(struct cpu_info *); 288 #define clear_resched(ci) (ci)->ci_want_resched = 0 289 290 #if defined(MULTIPROCESSOR) 291 292 #define MAXCPUS 64 /* bitmask */ 293 294 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 295 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 296 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 297 298 #define curcpu() ({struct cpu_info *__ci; \ 299 asm volatile("movq %%gs:%P1,%0" : "=r" (__ci) \ 300 :"n" (offsetof(struct cpu_info, ci_self))); \ 301 __ci;}) 302 #define cpu_number() (curcpu()->ci_cpuid) 303 304 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 305 #define CPU_IS_RUNNING(ci) ((ci)->ci_flags & CPUF_RUNNING) 306 307 extern struct cpu_info *cpu_info[MAXCPUS]; 308 309 void cpu_boot_secondary_processors(void); 310 311 void cpu_kick(struct cpu_info *); 312 void cpu_unidle(struct cpu_info *); 313 314 #define CPU_BUSY_CYCLE() __asm volatile("pause": : : "memory") 315 316 #else /* !MULTIPROCESSOR */ 317 318 #define MAXCPUS 1 319 320 #ifdef _KERNEL 321 #define curcpu() (&cpu_info_primary) 322 323 #define cpu_kick(ci) 324 #define cpu_unidle(ci) 325 326 #define CPU_BUSY_CYCLE() __asm volatile ("" ::: "memory") 327 328 #endif 329 330 /* 331 * definitions of cpu-dependent requirements 332 * referenced in generic code 333 */ 334 #define cpu_number() 0 335 #define CPU_IS_PRIMARY(ci) 1 336 #define CPU_IS_RUNNING(ci) 1 337 338 #endif /* MULTIPROCESSOR */ 339 340 #include <machine/cpufunc.h> 341 #include <machine/psl.h> 342 343 static inline unsigned int 344 cpu_rnd_messybits(void) 345 { 346 unsigned int hi, lo; 347 348 __asm volatile("rdtsc" : "=d" (hi), "=a" (lo)); 349 350 return (hi ^ lo); 351 } 352 353 #endif /* _KERNEL */ 354 355 #ifdef MULTIPROCESSOR 356 #include <sys/mplock.h> 357 #endif 358 359 #define aston(p) ((p)->p_md.md_astpending = 1) 360 361 #define curpcb curcpu()->ci_curpcb 362 363 /* 364 * Arguments to hardclock, softclock and statclock 365 * encapsulate the previous machine state in an opaque 366 * clockframe; for now, use generic intrframe. 367 */ 368 #define clockframe intrframe 369 370 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_rflags) 371 #define CLKF_PC(frame) ((frame)->if_rip) 372 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1) 373 374 /* 375 * Give a profiling tick to the current process when the user profiling 376 * buffer pages are invalid. On the i386, request an ast to send us 377 * through usertrap(), marking the proc as needing a profiling tick. 378 */ 379 #define need_proftick(p) aston(p) 380 381 void signotify(struct proc *); 382 383 /* 384 * We need a machine-independent name for this. 385 */ 386 extern void (*delay_func)(int); 387 void delay_fini(void (*)(int)); 388 void delay_init(void (*)(int), int); 389 struct timeval; 390 391 #define DELAY(x) (*delay_func)(x) 392 #define delay(x) (*delay_func)(x) 393 394 395 #ifdef _KERNEL 396 /* cpu.c */ 397 extern int cpu_feature; 398 extern int cpu_ebxfeature; 399 extern int cpu_ecxfeature; 400 extern int ecpu_ecxfeature; 401 extern int cpu_sev_guestmode; 402 extern int cpu_id; 403 extern char cpu_vendor[]; 404 extern int cpuid_level; 405 extern int cpu_meltdown; 406 extern u_int cpu_mwait_size; 407 extern u_int cpu_mwait_states; 408 409 int cpu_suspend_primary(void); 410 411 /* cacheinfo.c */ 412 void x86_print_cacheinfo(struct cpu_info *); 413 414 /* identcpu.c */ 415 void identifycpu(struct cpu_info *); 416 int cpu_amd64speed(int *); 417 extern int cpuspeed; 418 extern int amd64_pos_cbit; 419 420 /* machdep.c */ 421 void dumpconf(void); 422 void cpu_set_vendor(struct cpu_info *, int _level, const char *_vendor); 423 void cpu_reset(void); 424 void x86_64_proc0_tss_ldt_init(void); 425 int amd64_pa_used(paddr_t); 426 #define cpu_idle_enter() do { /* nothing */ } while (0) 427 extern void (*cpu_idle_cycle_fcn)(void); 428 extern void (*cpu_suspend_cycle_fcn)(void); 429 #define cpu_idle_cycle() (*cpu_idle_cycle_fcn)() 430 #define cpu_idle_leave() do { /* nothing */ } while (0) 431 extern void (*initclock_func)(void); 432 extern void (*startclock_func)(void); 433 434 struct region_descriptor; 435 void lgdt(struct region_descriptor *); 436 437 struct pcb; 438 void savectx(struct pcb *); 439 void proc_trampoline(void); 440 441 /* clock.c */ 442 void startclocks(void); 443 void rtcinit(void); 444 void rtcstart(void); 445 void rtcstop(void); 446 void i8254_delay(int); 447 void i8254_initclocks(void); 448 void i8254_startclock(void); 449 void i8254_start_both_clocks(void); 450 void i8254_inittimecounter(void); 451 void i8254_inittimecounter_simple(void); 452 453 /* i8259.c */ 454 void i8259_default_setup(void); 455 456 void cpu_init_msrs(struct cpu_info *); 457 void cpu_fix_msrs(struct cpu_info *); 458 void cpu_tsx_disable(struct cpu_info *); 459 460 /* dkcsum.c */ 461 void dkcsumattach(void); 462 463 /* bus_machdep.c */ 464 void x86_bus_space_init(void); 465 void x86_bus_space_mallocok(void); 466 467 /* powernow-k8.c */ 468 void k8_powernow_init(struct cpu_info *); 469 void k8_powernow_setperf(int); 470 471 /* k1x-pstate.c */ 472 void k1x_init(struct cpu_info *); 473 void k1x_setperf(int); 474 475 void est_init(struct cpu_info *); 476 void est_setperf(int); 477 478 #ifdef MULTIPROCESSOR 479 /* mp_setperf.c */ 480 void mp_setperf_init(void); 481 #endif 482 483 #endif /* _KERNEL */ 484 485 /* 486 * CTL_MACHDEP definitions. 487 */ 488 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 489 #define CPU_BIOS 2 /* BIOS variables */ 490 #define CPU_BLK2CHR 3 /* convert blk maj into chr one */ 491 #define CPU_CHR2BLK 4 /* convert chr maj into blk one */ 492 #define CPU_ALLOWAPERTURE 5 /* allow mmap of /dev/xf86 */ 493 #define CPU_CPUVENDOR 6 /* cpuid vendor string */ 494 #define CPU_CPUID 7 /* cpuid */ 495 #define CPU_CPUFEATURE 8 /* cpuid features */ 496 #define CPU_KBDRESET 10 /* keyboard reset under pcvt */ 497 #define CPU_XCRYPT 12 /* supports VIA xcrypt in userland */ 498 #define CPU_LIDACTION 14 /* action caused by lid close */ 499 #define CPU_FORCEUKBD 15 /* Force ukbd(4) as console keyboard */ 500 #define CPU_TSCFREQ 16 /* TSC frequency */ 501 #define CPU_INVARIANTTSC 17 /* has invariant TSC */ 502 #define CPU_PWRACTION 18 /* action caused by power button */ 503 #define CPU_RETPOLINE 19 /* cpu requires retpoline pattern */ 504 #define CPU_MAXID 20 /* number of valid machdep ids */ 505 506 #define CTL_MACHDEP_NAMES { \ 507 { 0, 0 }, \ 508 { "console_device", CTLTYPE_STRUCT }, \ 509 { "bios", CTLTYPE_INT }, \ 510 { "blk2chr", CTLTYPE_STRUCT }, \ 511 { "chr2blk", CTLTYPE_STRUCT }, \ 512 { "allowaperture", CTLTYPE_INT }, \ 513 { "cpuvendor", CTLTYPE_STRING }, \ 514 { "cpuid", CTLTYPE_INT }, \ 515 { "cpufeature", CTLTYPE_INT }, \ 516 { 0, 0 }, \ 517 { "kbdreset", CTLTYPE_INT }, \ 518 { 0, 0 }, \ 519 { "xcrypt", CTLTYPE_INT }, \ 520 { 0, 0 }, \ 521 { "lidaction", CTLTYPE_INT }, \ 522 { "forceukbd", CTLTYPE_INT }, \ 523 { "tscfreq", CTLTYPE_QUAD }, \ 524 { "invarianttsc", CTLTYPE_INT }, \ 525 { "pwraction", CTLTYPE_INT }, \ 526 { "retpoline", CTLTYPE_INT }, \ 527 } 528 529 #endif /* !_MACHINE_CPU_H_ */ 530