xref: /netbsd-src/sys/arch/sparc64/include/bus_defs.h (revision bf158e33f8ddb4806758d116c5263901660763ff)
1 /*	$NetBSD: bus_defs.h,v 1.5 2019/09/23 16:17:58 skrll Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Copyright (c) 1997-1999, 2001 Eduardo E. Horvath. All rights reserved.
35  * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
36  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
37  *
38  * Redistribution and use in source and binary forms, with or without
39  * modification, are permitted provided that the following conditions
40  * are met:
41  * 1. Redistributions of source code must retain the above copyright
42  *    notice, this list of conditions and the following disclaimer.
43  * 2. Redistributions in binary form must reproduce the above copyright
44  *    notice, this list of conditions and the following disclaimer in the
45  *    documentation and/or other materials provided with the distribution.
46  * 3. All advertising materials mentioning features or use of this software
47  *    must display the following acknowledgement:
48  *      This product includes software developed by Christopher G. Demetriou
49  *	for the NetBSD Project.
50  * 4. The name of the author may not be used to endorse or promote products
51  *    derived from this software without specific prior written permission
52  *
53  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
54  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
55  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
56  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
57  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
58  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
62  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63  */
64 
65 #ifndef _SPARC64_BUS_DEFS_H_
66 #define _SPARC64_BUS_DEFS_H_
67 
68 #include <machine/types.h>
69 #include <machine/ctlreg.h>
70 
71 /*
72  * Debug hooks
73  */
74 
75 #define	BSDB_ACCESS	0x01
76 #define BSDB_MAP	0x02
77 
78 /*
79  * UPA and SBUS spaces are non-cached and big endian
80  * (except for RAM and PROM)
81  *
82  * PCI spaces are non-cached and little endian
83  */
84 
85 enum bus_type {
86 	UPA_BUS_SPACE,
87 	SBUS_BUS_SPACE,
88 	PCI_CONFIG_BUS_SPACE,
89 	PCI_IO_BUS_SPACE,
90 	PCI_MEMORY_BUS_SPACE,
91 	LAST_BUS_SPACE
92 };
93 /* For backwards compatibility */
94 #define SPARC_BUS_SPACE	UPA_BUS_SPACE
95 
96 #define __BUS_SPACE_HAS_STREAM_METHODS	1
97 
98 /*
99  * Bus address and size types
100  */
101 typedef	struct _bus_space_handle {
102 	uint64_t _ptr;
103 	uint8_t	 _asi;
104 	uint8_t	 _sasi;
105 } bus_space_handle_t;
106 typedef enum bus_type	bus_type_t;
107 typedef uint64_t	bus_addr_t;
108 typedef uint64_t	bus_size_t;
109 
110 #define PRIxBUSADDR	PRIx64
111 #define PRIxBUSSIZE	PRIx64
112 #define PRIuBUSSIZE	PRIu64
113 
114 /*
115  * XXXX -- convert prom virtual address to bus_space_handle_t
116  */
117 #define	sparc_promaddr_to_handle(tag, promaddr, hp)	\
118 	do {						\
119 		(hp)->_ptr = (uint64_t)(promaddr);	\
120 		(hp)->_asi = ASI_PRIMARY;		\
121 		(hp)->_sasi = ASI_PRIMARY;		\
122 	} while (0)
123 
124 /* For buses which have an iospace. */
125 #define	BUS_ADDR_IOSPACE(x)	((x)>>32)
126 #define	BUS_ADDR_PADDR(x)	((x)&0xffffffff)
127 #define	BUS_ADDR(io, pa)	((((bus_addr_t)io)<<32)|(pa))
128 
129 /*
130  * Access methods for bus resources and address space.
131  */
132 typedef struct sparc_bus_space_tag	*bus_space_tag_t;
133 
134 struct sparc_bus_space_tag {
135 	void		*cookie;
136 	bus_space_tag_t	parent;
137 	/*
138 	 * Windows onto the parent bus that this tag maps.  If ranges
139 	 * is non-NULL, the address will be translated, and recursively
140 	 * mapped via the parent tag.
141 	 */
142 	struct openprom_range *ranges;
143 	int nranges;
144 
145 	int		type;
146 
147 	int	(*sparc_bus_alloc)(bus_space_tag_t, bus_addr_t,
148 		bus_addr_t, bus_size_t, bus_size_t, bus_size_t, int,
149 		bus_addr_t *, bus_space_handle_t *);
150 
151 	void	(*sparc_bus_free)(bus_space_tag_t, bus_space_handle_t,
152 		bus_size_t);
153 
154 	int	(*sparc_bus_map)(bus_space_tag_t, bus_addr_t, bus_size_t,
155 		int, vaddr_t, bus_space_handle_t *);
156 
157 	int	(*sparc_bus_unmap)(bus_space_tag_t, bus_space_handle_t,
158 		bus_size_t);
159 
160 	int	(*sparc_bus_subregion)(bus_space_tag_t,
161 		bus_space_handle_t, bus_size_t,	bus_size_t,
162 		bus_space_handle_t *);
163 
164 	paddr_t	(*sparc_bus_mmap)(bus_space_tag_t, bus_addr_t, off_t,
165 		int, int);
166 
167 	void	*(*sparc_intr_establish)(bus_space_tag_t, int, int,
168 		int (*)(void *), void *, void (*)(void));
169 
170 };
171 
172 /* flags for bus space map functions */
173 #define	BUS_SPACE_MAP_READONLY		0x0008
174 #define	BUS_SPACE_MAP_BUS1		0x0100
175 #define	BUS_SPACE_MAP_BUS2		0x0200
176 #define	BUS_SPACE_MAP_BUS3		0x0400
177 #define	BUS_SPACE_MAP_BUS4		0x0800
178 #define BUS_SPACE_MAP_LITTLE		0x1000
179 /* sparc uses this, it's not supposed to do anything on sparc64 */
180 #define BUS_SPACE_MAP_LARGE		0
181 
182 /* flags for bus_space_barrier() */
183 #define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
184 #define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
185 
186 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
187 
188 /*
189  * Flags used in various bus DMA methods.
190  */
191 #define	BUS_DMA_NOWRITE		BUS_DMA_BUS1
192 #define	BUS_DMA_DVMA		BUS_DMA_BUS2	/* Don't bother with alignment */
193 
194 /* Forwards needed by prototypes below. */
195 struct mbuf;
196 struct uio;
197 
198 /*
199  * Operations performed by bus_dmamap_sync().
200  */
201 #define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
202 #define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
203 #define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
204 #define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
205 
206 typedef struct sparc_bus_dma_tag	*bus_dma_tag_t;
207 typedef struct sparc_bus_dmamap		*bus_dmamap_t;
208 
209 #define BUS_DMA_TAG_VALID(t)	((t) != (bus_dma_tag_t)0)
210 
211 /*
212  *	bus_dma_segment_t
213  *
214  *	Describes a single contiguous DMA transaction.  Values
215  *	are suitable for programming into DMA registers.
216  */
217 struct sparc_bus_dma_segment {
218 	bus_addr_t	ds_addr;	/* DVMA address */
219 	bus_size_t	ds_len;		/* length of transfer */
220 	bus_size_t	_ds_boundary;	/* don't cross this */
221 	bus_size_t	_ds_align;	/* align to this */
222 	void		*_ds_mlist;	/* XXX - dmamap_alloc'ed pages */
223 };
224 typedef struct sparc_bus_dma_segment	bus_dma_segment_t;
225 
226 
227 /*
228  *	bus_dma_tag_t
229  *
230  *	A machine-dependent opaque type describing the implementation of
231  *	DMA for a given bus.
232  */
233 struct sparc_bus_dma_tag {
234 	void	*_cookie;		/* cookie used in the guts */
235 	struct sparc_bus_dma_tag* _parent;
236 
237 	/*
238 	 * DMA mapping methods.
239 	 */
240 	int	(*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
241 		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
242 	void	(*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
243 	int	(*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
244 		    bus_size_t, struct proc *, int);
245 	int	(*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
246 		    struct mbuf *, int);
247 	int	(*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
248 		    struct uio *, int);
249 	int	(*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
250 		    bus_dma_segment_t *, int, bus_size_t, int);
251 	void	(*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
252 	void	(*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
253 		    bus_addr_t, bus_size_t, int);
254 
255 	/*
256 	 * DMA memory utility functions.
257 	 */
258 	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
259 		    bus_size_t, bus_dma_segment_t *, int, int *, int);
260 	void	(*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int);
261 	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
262 		    int, size_t, void **, int);
263 	void	(*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
264 	paddr_t	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
265 		    int, off_t, int, int);
266 };
267 
268 /*
269  *	bus_dmamap_t
270  *
271  *	Describes a DMA mapping.
272  */
273 struct sparc_bus_dmamap {
274 	/*
275 	 * PRIVATE MEMBERS: not for use by machine-independent code.
276 	 */
277 	bus_addr_t	_dm_dvmastart;	/* start and size of allocated */
278 	bus_size_t	_dm_dvmasize;	/* DVMA segment for this map. */
279 
280 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
281 	bus_size_t	_dm_maxmaxsegsz; /* fixed largest possible segment */
282 	bus_size_t	_dm_boundary;	/* don't cross this */
283 	int		_dm_segcnt;	/* number of segs this map can map */
284 	int		_dm_flags;	/* misc. flags */
285 #define _DM_TYPE_LOAD	0
286 #define _DM_TYPE_SEGS	1
287 #define _DM_TYPE_UIO	2
288 #define _DM_TYPE_MBUF	3
289 	int		_dm_type;	/* type of mapping: raw, uio, mbuf, etc */
290 	void		*_dm_source;	/* source mbuf, uio, etc. needed for unload */
291 
292 	void		*_dm_cookie;	/* cookie for bus-specific functions */
293 
294 	/*
295 	 * PUBLIC MEMBERS: these are used by machine-independent code.
296 	 */
297 	bus_size_t	dm_maxsegsz;	/* largest possible segment */
298 	bus_size_t	dm_mapsize;	/* size of the mapping */
299 	int		dm_nsegs;	/* # valid segments in mapping */
300 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
301 };
302 
303 #endif /* _SPARC64_BUS_DEFS_H_ */
304