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Searched defs:Available (Results 1 – 13 of 13) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZMachineScheduler.h96 SUSet Available; variable
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600MachineScheduler.h53 std::vector<SUnit *> Available[IDLast], Pending[IDLast]; variable
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DLoads.cpp550 if (Value *Available = getAvailableLoadStore(Inst, StrippedPtr, AccessTy, in findAvailablePtrLoadStore() local
619 Value *Available = nullptr;; in FindAvailableLoadedValue() local
H A DScalarEvolution.cpp5266 bool Available = true; in IsAvailableOnEntry() member
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.h137 ReadyQueue Available; member
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMips16InstrInfo.cpp378 BitVector Available = rs.getRegsAvailable(&Mips::CPU16RegsRegClass); in loadImmediate() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DRegisterScavenging.cpp539 BitVector Available = getRegsAvailable(RC); in scavengeRegister() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/
H A DSafepointIRVerifier.cpp783 AvailableValueSet &Available) { in transferInstruction()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DMachineScheduler.h621 ReadyQueue Available; variable
/netbsd-src/external/apache2/llvm/dist/clang/lib/APINotes/
H A DAPINotesYAMLCompiler.cpp30 Available = 0, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
H A DGVN.cpp703 Available = 1, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRExpandPseudoInsts.cpp921 BitVector Available = RS.getRegsAvailable(&AVR::GPR8RegClass); in scavengeGPR8() local
/netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/
H A DSemaOverload.cpp11196 bool Available = checkAddressOfCandidateIsAvailable(S, Cand->Function); in NoteFunctionCandidate() local