| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 223 Register AddrReg = MI.getOperand(2).getReg(); in doAtomicBinOpExpansion() local
285 Register AddrReg = MI.getOperand(2).getReg(); in doMaskedAtomicBinOpExpansion() local
425 Register AddrReg = MI.getOperand(3).getReg(); in expandAtomicMinMaxOp() local
537 Register AddrReg = MI.getOperand(2).getReg(); in expandAtomicCmpXchg() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 101 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask()
114 unsigned AddrReg = MI.getOperand(0).getReg(); in sandboxIndirectJump() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCExpandPseudos.cpp | 62 unsigned AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in ExpandStore() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 196 Register AddrReg = MI.getOperand(2).getReg(); in expandCMP_SWAP() local
276 Register AddrReg = MI.getOperand(3).getReg(); in expandCMP_SWAP_128() local
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| H A D | AArch64SIMDInstrOpt.cpp | 507 unsigned SeqReg, AddrReg; in optimizeLdStInterleave() local
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| H A D | AArch64FastISel.cpp | 2037 unsigned AddrReg, in emitStoreRelease()
2177 unsigned AddrReg = getRegForValue(PtrV); in selectStore() local
2496 unsigned AddrReg = getRegForValue(BI->getOperand(0)); in selectIndirectBr() local
4981 const unsigned AddrReg = constrainOperandRegClass( in selectAtomicCmpXchg() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | 101 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
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| H A D | X86SpeculativeLoadHardening.cpp | 1162 Register AddrReg = MRI->createVirtualRegister(&X86::GR64RegClass); in tracePredStateThroughIndirectBranches() local
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| H A D | X86InstructionSelector.cpp | 1409 Register AddrReg = MRI.createVirtualRegister(&X86::GR64RegClass); in materializeFP() local
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| H A D | X86FastISel.cpp | 3775 Register AddrReg = createResultReg(&X86::GR64RegClass); in X86MaterializeFP() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 145 auto AddrReg = MIRBuilder.buildFrameIndex(LLT::pointer(0, 64), FI); in getStackAddress() local
257 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 105 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
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| H A D | ARMExpandPseudoInsts.cpp | 1592 Register AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP() local
1720 Register AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP_64() local
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| H A D | ARMFastISel.cpp | 1318 unsigned AddrReg = getRegForValue(I->getOperand(0)); in SelectIndirectBr() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SILoadStoreOptimizer.cpp | 110 const MachineOperand *AddrReg[MaxAddressRegs]; member
1054 const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeRead2Pair() local
1153 const MachineOperand *AddrReg = in mergeWrite2Pair() local
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| H A D | AMDGPUCallLowering.cpp | 99 auto AddrReg = MIRBuilder.buildFrameIndex( in getStackAddress() local
205 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress() local
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| H A D | R600InstrInfo.cpp | 1103 unsigned AddrReg; in buildIndirectWrite() local
1135 unsigned AddrReg; in buildIndirectRead() local
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| H A D | AMDGPULegalizerInfo.cpp | 4028 Register AddrReg = SrcOp.getReg(); in packImage16bitOpsToDwords() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 271 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
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| H A D | MipsISelLowering.cpp | 2546 unsigned AddrReg = ABI.IsN64() ? Mips::V0_64 : Mips::V0; in lowerEH_RETURN() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 741 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); in printInst() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 1859 unsigned AddrReg = getRegForValue(I->getOperand(0)); in SelectIndirectBr() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3868 Register AddrReg = MI.getOperand(1).getReg(); in reduceLoadStoreWidth() local
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