1 typedef struct Atable Atable; 2 typedef struct Facs Facs; 3 typedef struct Fadt Fadt; 4 typedef struct Gas Gas; 5 typedef struct Gpe Gpe; 6 typedef struct Rsdp Rsdp; 7 typedef struct Sdthdr Sdthdr; 8 typedef struct Parse Parse; 9 typedef struct Xsdt Xsdt; 10 typedef struct Regio Regio; 11 typedef struct Reg Reg; 12 typedef struct Madt Madt; 13 typedef struct Msct Msct; 14 typedef struct Mdom Mdom; 15 typedef struct Apicst Apicst; 16 typedef struct Srat Srat; 17 typedef struct Slit Slit; 18 typedef struct SlEntry SlEntry; 19 typedef struct Hpet Hpet; 20 21 enum 22 { 23 24 Sdthdrsz = 36, /* size of SDT header */ 25 26 /* ACPI regions. Gas ids */ 27 Rsysmem = 0, 28 Rsysio, 29 Rpcicfg, 30 Rembed, 31 Rsmbus, 32 Rcmos, 33 Rpcibar, 34 Ripmi, 35 Rfixedhw = 0x7f, 36 37 /* ACPI PM1 control */ 38 Pm1SciEn = 0x1, /* Generate SCI and not SMI */ 39 40 /* ACPI tbdf as encoded in acpi region base addresses */ 41 Rpciregshift = 0, 42 Rpciregmask = 0xFFFF, 43 Rpcifunshift = 16, 44 Rpcifunmask = 0xFFFF, 45 Rpcidevshift = 32, 46 Rpcidevmask = 0xFFFF, 47 Rpcibusshift = 48, 48 Rpcibusmask = 0xFFFF, 49 50 /* Apic structure types */ 51 ASlapic = 0, /* processor local apic */ 52 ASioapic, /* I/O apic */ 53 ASintovr, /* Interrupt source override */ 54 ASnmi, /* NMI source */ 55 ASlnmi, /* local apic nmi */ 56 ASladdr, /* local apic address override */ 57 ASiosapic, /* I/O sapic */ 58 ASlsapic, /* local sapic */ 59 ASintsrc, /* platform interrupt sources */ 60 ASlx2apic, /* local x2 apic */ 61 ASlx2nmi, /* local x2 apic NMI */ 62 63 /* Apic flags */ 64 AFbus = 0, /* polarity/trigger like in ISA */ 65 AFhigh = 1, /* active high */ 66 AFlow = 3, /* active low */ 67 AFpmask = 3, /* polarity bits */ 68 AFedge = 1<<2, /* edge triggered */ 69 AFlevel = 3<<2, /* level triggered */ 70 AFtmask = 3<<2, /* trigger bits */ 71 72 /* SRAT types */ 73 SRlapic = 0, /* Local apic/sapic affinity */ 74 SRmem, /* Memory affinity */ 75 SRlx2apic, /* x2 apic affinity */ 76 77 /* Arg for _PIC */ 78 Ppic = 0, /* PIC interrupt model */ 79 Papic, /* APIC interrupt model */ 80 Psapic, /* SAPIC interrupt model */ 81 82 83 CMregion = 0, /* regio name spc base len accsz*/ 84 CMgpe, /* gpe name id */ 85 86 Qdir = 0, 87 Qctl, 88 Qtbl, 89 Qio, 90 }; 91 92 /* 93 * ACPI table (sw) 94 */ 95 struct Atable 96 { 97 Atable* next; /* next table in list */ 98 int is64; /* uses 64bits */ 99 char sig[5]; /* signature */ 100 char oemid[7]; /* oem id str. */ 101 char oemtblid[9]; /* oem tbl. id str. */ 102 uchar* tbl; /* pointer to table in memory */ 103 long dlen; /* size of data in table, after Stdhdr */ 104 }; 105 106 struct Gpe 107 { 108 int stsio; /* port used for status */ 109 int stsbit; /* bit number */ 110 int enio; /* port used for enable */ 111 int enbit; /* bit number */ 112 int nb; /* event number */ 113 char* obj; /* handler object */ 114 int id; /* id as supplied by user */ 115 }; 116 117 struct Parse 118 { 119 char* sig; 120 Atable* (*f)(uchar*, int); /* return nil to keep vmap */ 121 }; 122 123 struct Regio{ 124 void *arg; 125 u8int (*get8)(uintptr, void*); 126 void (*set8)(uintptr, u8int, void*); 127 u16int (*get16)(uintptr, void*); 128 void (*set16)(uintptr, u16int, void*); 129 u32int (*get32)(uintptr, void*); 130 void (*set32)(uintptr, u32int, void*); 131 u64int (*get64)(uintptr, void*); 132 void (*set64)(uintptr, u64int, void*); 133 }; 134 135 struct Reg 136 { 137 char* name; 138 int spc; /* io space */ 139 u64int base; /* address, physical */ 140 uchar* p; /* address, kmapped */ 141 u64int len; 142 int tbdf; 143 int accsz; /* access size */ 144 }; 145 146 /* Generic address structure. 147 */ 148 #pragma pack on 149 struct Gas 150 { 151 u8int spc; /* address space id */ 152 u8int len; /* register size in bits */ 153 u8int off; /* bit offset */ 154 u8int accsz; /* 1: byte; 2: word; 3: dword; 4: qword */ 155 u64int addr; /* address (or acpi encoded tbdf + reg) */ 156 }; 157 158 /* Root system description table pointer. 159 * Used to locate the root system description table RSDT 160 * (or the extended system description table from version 2) XSDT. 161 * The XDST contains (after the DST header) a list of pointers to tables: 162 * - FADT fixed acpi description table. 163 * It points to the DSDT, AML code making the acpi namespace. 164 * - SSDTs tables with AML code to add to the acpi namespace. 165 * - pointers to other tables for apics, etc. 166 */ 167 168 struct Rsdp 169 { 170 u8int signature[8]; /* "RSD PTR " */ 171 u8int rchecksum; 172 u8int oemid[6]; 173 u8int revision; 174 u8int raddr[4]; /* RSDT */ 175 u8int length[4]; 176 u8int xaddr[8]; /* XSDT */ 177 u8int xchecksum; /* XSDT */ 178 u8int _33_[3]; /* reserved */ 179 }; 180 181 /* Header for ACPI description tables 182 */ 183 struct Sdthdr 184 { 185 u8int sig[4]; /* "FACP" or whatever */ 186 u8int length[4]; 187 u8int rev; 188 u8int csum; 189 u8int oemid[6]; 190 u8int oemtblid[8]; 191 u8int oemrev[4]; 192 u8int creatorid[4]; 193 u8int creatorrev[4]; 194 }; 195 196 /* Firmware control structure 197 */ 198 struct Facs 199 { 200 u32int hwsig; 201 u32int wakingv; 202 u32int glock; 203 u32int flags; 204 u64int xwakingv; 205 u8int vers; 206 u32int ospmflags; 207 }; 208 209 #pragma pack off 210 211 /* Maximum System Characteristics table 212 */ 213 struct Msct 214 { 215 int ndoms; /* number of domains */ 216 int nclkdoms; /* number of clock domains */ 217 u64int maxpa; /* max physical address */ 218 219 Mdom* dom; /* domain information list */ 220 }; 221 222 struct Mdom 223 { 224 Mdom* next; 225 int start; /* start dom id */ 226 int end; /* end dom id */ 227 int maxproc; /* max processor capacity */ 228 u64int maxmem; /* max memory capacity */ 229 }; 230 231 /* Multiple APIC description table 232 * Interrupts are virtualized by ACPI and each APIC has 233 * a `virtual interrupt base' where its interrupts start. 234 * Addresses are processor-relative physical addresses. 235 * Only enabled devices are linked, others are filtered out. 236 */ 237 struct Madt 238 { 239 uintmem lapicpa; /* local APIC addr */ 240 int pcat; /* the machine has PC/AT 8259s */ 241 Apicst* st; /* list of Apic related structures */ 242 }; 243 244 struct Apicst 245 { 246 int type; 247 Apicst* next; 248 union{ 249 struct{ 250 int pid; /* processor id */ 251 int id; /* apic no */ 252 } lapic; 253 struct{ 254 int id; /* io apic id */ 255 int ibase; /* interrupt base addr. */ 256 uintmem addr; /* base address */ 257 } ioapic, iosapic; 258 struct{ 259 int irq; /* bus intr. source (ISA only) */ 260 int intr; /* system interrupt */ 261 int flags; /* apic flags */ 262 } intovr; 263 struct{ 264 int intr; /* system interrupt */ 265 int flags; /* apic flags */ 266 } nmi; 267 struct{ 268 int pid; /* processor id */ 269 int flags; /* lapic flags */ 270 int lint; /* lapic LINTn for nmi */ 271 } lnmi; 272 struct{ 273 int pid; /* processor id */ 274 int id; /* apic id */ 275 int eid; /* apic eid */ 276 int puid; /* processor uid */ 277 char* puids; /* same thing */ 278 } lsapic; 279 struct{ 280 int pid; /* processor id */ 281 int peid; /* processor eid */ 282 int iosv; /* io sapic vector */ 283 int intr; /* global sys intr. */ 284 int type; /* intr type */ 285 int flags; /* apic flags */ 286 int any; /* err sts at any proc */ 287 } intsrc; 288 struct{ 289 int id; /* x2 apic id */ 290 int puid; /* processor uid */ 291 } lx2apic; 292 struct{ 293 int puid; 294 int flags; 295 int intr; 296 } lx2nmi; 297 }; 298 }; 299 300 /* System resource affinity table 301 */ 302 struct Srat 303 { 304 int type; 305 Srat* next; 306 union{ 307 struct{ 308 int dom; /* proximity domain */ 309 int apic; /* apic id */ 310 int sapic; /* sapic id */ 311 int clkdom; /* clock domain */ 312 } lapic; 313 struct{ 314 int dom; /* proximity domain */ 315 u64int addr; /* base address */ 316 u64int len; 317 int hplug; /* hot pluggable */ 318 int nvram; /* non volatile */ 319 } mem; 320 struct{ 321 int dom; /* proximity domain */ 322 int apic; /* x2 apic id */ 323 int clkdom; /* clock domain */ 324 } lx2apic; 325 }; 326 }; 327 328 /* System locality information table 329 */ 330 struct Slit { 331 uvlong rowlen; 332 SlEntry **e; 333 }; 334 335 struct SlEntry { 336 int dom; /* proximity domain */ 337 uint dist; /* distance to proximity domain */ 338 }; 339 340 /* Fixed ACPI description table. 341 * Describes implementation and hardware registers. 342 * PM* blocks are low level functions. 343 * GPE* blocks refer to general purpose events. 344 * P_* blocks are for processor features. 345 * Has address for the DSDT. 346 */ 347 struct Fadt 348 { 349 u32int facs; 350 u32int dsdt; 351 /* 1 reserved */ 352 u8int pmprofile; 353 u16int sciint; 354 u32int smicmd; 355 u8int acpienable; 356 u8int acpidisable; 357 u8int s4biosreq; 358 u8int pstatecnt; 359 u32int pm1aevtblk; 360 u32int pm1bevtblk; 361 u32int pm1acntblk; 362 u32int pm1bcntblk; 363 u32int pm2cntblk; 364 u32int pmtmrblk; 365 u32int gpe0blk; 366 u32int gpe1blk; 367 u8int pm1evtlen; 368 u8int pm1cntlen; 369 u8int pm2cntlen; 370 u8int pmtmrlen; 371 u8int gpe0blklen; 372 u8int gpe1blklen; 373 u8int gp1base; 374 u8int cstcnt; 375 u16int plvl2lat; 376 u16int plvl3lat; 377 u16int flushsz; 378 u16int flushstride; 379 u8int dutyoff; 380 u8int dutywidth; 381 u8int dayalrm; 382 u8int monalrm; 383 u8int century; 384 u16int iapcbootarch; 385 /* 1 reserved */ 386 u32int flags; 387 Gas resetreg; 388 u8int resetval; 389 /* 3 reserved */ 390 u64int xfacs; 391 u64int xdsdt; 392 Gas xpm1aevtblk; 393 Gas xpm1bevtblk; 394 Gas xpm1acntblk; 395 Gas xpm1bcntblk; 396 Gas xpm2cntblk; 397 Gas xpmtmrblk; 398 Gas xgpe0blk; 399 Gas xgpe1blk; 400 }; 401 402 /* XSDT/RSDT. 4/8 byte addresses starting at p. 403 */ 404 struct Xsdt 405 { 406 int len; 407 int asize; 408 u8int* p; 409 }; 410 411 struct Hpet 412 { 413 u32int id; /* Event Timer Bock ID */ 414 uintptr addr; /* ACPI Format Address (Gas) */ 415 u8int seqno; /* Sequence Number */ 416 u16int minticks; /* Minimum Clock Tick */ 417 u8int attr; /* Page Protection */ 418 }; 419 420 extern uintmem acpimblocksize(uintmem, int*); 421