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    <title>Changes in indvars-vectorization.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>29441e4f5fa5f5c7709f7cf180815ba97f611297 - [IR] Convert from nocapture to captures(none) (#123181)</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll#29441e4f5fa5f5c7709f7cf180815ba97f611297</link>
        <description>[IR] Convert from nocapture to captures(none) (#123181)This PR removes the old `nocapture` attribute, replacing it with the new`captures` attribute introduced in #116990. This change isintended to be essentially NFC, replacing existing uses of `nocapture`with `captures(none)` without adding any new analysis capabilities.Making use of non-`none` values is left for a followup.Some notes:* `nocapture` will be upgraded to `captures(none)` by the bitcode   reader.* `nocapture` will also be upgraded by the textual IR reader. This is to   make it easier to use old IR files and somewhat reduce the test churn in   this PR.* Helper APIs like `doesNotCapture()` will check for `captures(none)`.* MLIR import will convert `captures(none)` into an `llvm.nocapture`   attribute. The representation in the LLVM IR dialect should be updated   separately.

            List of files:
            /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll</description>
        <pubDate>Wed, 29 Jan 2025 15:56:47 +0000</pubDate>
        <dc:creator>Nikita Popov &lt;npopov@redhat.com&gt;</dc:creator>
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<item>
        <title>d1e5e6735a845f1281f11389da1e5a55a0d2e87a - [PhaseOrdering] Update test RUN lines to use `-passes=&quot;default&lt;O3&gt;&quot;` to allow evaluation by DOS batch scripts. NFC.</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll#d1e5e6735a845f1281f11389da1e5a55a0d2e87a</link>
        <description>[PhaseOrdering] Update test RUN lines to use `-passes=&quot;default&lt;O3&gt;&quot;` to allow evaluation by DOS batch scripts. NFC.`-passes=&apos;default&lt;O3&gt;&apos;` isn&apos;t correctly parsed on DOS, so when update_test_checks.py runs a system call on the opt RUN line, it fails to evaluate properly - use `-passes=&quot;default&lt;O3&gt;&quot;` instead.

            List of files:
            /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll</description>
        <pubDate>Tue, 31 Dec 2024 15:25:12 +0000</pubDate>
        <dc:creator>Simon Pilgrim &lt;llvm-dev@redking.me.uk&gt;</dc:creator>
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        <title>4ad0fdd1631eeae432714c03ede01a10dc00025d - [VPlan] Remove reverse() of predecessors from VPInstruction::generate.</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll#4ad0fdd1631eeae432714c03ede01a10dc00025d</link>
        <description>[VPlan] Remove reverse() of predecessors from VPInstruction::generate.This was originally done to reduce the diff for the change. Remove itand update the remaining tests. NFC modulo reordering of incomingvalues.Clean up after https://github.com/llvm/llvm-project/pull/114292.

            List of files:
            /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll</description>
        <pubDate>Tue, 17 Dec 2024 20:44:31 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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<item>
        <title>462cb3cd6cecd0511ecaf0e3ebcaba455ece587d - [InstCombine] Infer nusw + nneg -&gt; nuw for getelementptr (#111144)</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll#462cb3cd6cecd0511ecaf0e3ebcaba455ece587d</link>
        <description>[InstCombine] Infer nusw + nneg -&gt; nuw for getelementptr (#111144)If the gep is nusw (usually via inbounds) and the offset isnon-negative, we can infer nuw.Proof: https://alive2.llvm.org/ce/z/ihztLy

            List of files:
            /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll</description>
        <pubDate>Thu, 05 Dec 2024 13:36:40 +0000</pubDate>
        <dc:creator>Nikita Popov &lt;npopov@redhat.com&gt;</dc:creator>
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        <title>dce77a357948709e335910ddc07f9c3f2eb2ac4b - [IndVars] Preserve flags of narrow IV inc if replacing with wider inc. (#80446)</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll#dce77a357948709e335910ddc07f9c3f2eb2ac4b</link>
        <description>[IndVars] Preserve flags of narrow IV inc if replacing with wider inc. (#80446)We are replacing a narrow IV increment with a wider one. If the original(narrow) increment did not wrap, the wider one should not wrap either.Set the flags to be the union of both wide increment and originalincrement; this ensures we preserve flags SCEV could infer for the widerincrement.Fixes https://github.com/llvm/llvm-project/issues/71517.

            List of files:
            /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll</description>
        <pubDate>Sat, 10 Feb 2024 18:11:17 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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        <title>f47c4067fd30ef4318f6ff4d4afafd1ef8a2e262 - [PhaseOrder] Add test where indvars dropping NSW prevents vectorization.</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll#f47c4067fd30ef4318f6ff4d4afafd1ef8a2e262</link>
        <description>[PhaseOrder] Add test where indvars dropping NSW prevents vectorization.End-to-end test for https://github.com/llvm/llvm-project/issues/71517,testing IndVars/LoopVectorize interaction

            List of files:
            /llvm-project/llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll</description>
        <pubDate>Tue, 23 Jan 2024 11:37:03 +0000</pubDate>
        <dc:creator>Florian Hahn &lt;flo@fhahn.com&gt;</dc:creator>
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