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    <title>Changes in multi-cycle.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>2208c97c1bec2512d4e47b6223db6d95a7037956 - [Hexagon,test] Change llc -march= to -mtriple=</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll#2208c97c1bec2512d4e47b6223db6d95a7037956</link>
        <description>[Hexagon,test] Change llc -march= to -mtriple=Similar to 806761a7629df268c8aed49657aeccffa6bca449-mtriple= specifies the full target triple while -march= merely sets thearchitecture part of the default target triple, leaving a target triple whichmay not make sense.Therefore, -march= is error-prone and not recommended for tests without a targettriple. The issue has been benign as we recognize $unknown-apple-darwin as ELF insteadof rejecting it outrightly.

            List of files:
            /llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll</description>
        <pubDate>Sun, 15 Dec 2024 18:20:22 +0000</pubDate>
        <dc:creator>Fangrui Song &lt;i@maskray.me&gt;</dc:creator>
    </item>
<item>
        <title>a96f691985c8546e826012fdc3481c88f034a194 - [Hexagon] Convert some tests to opaque pointers (NFC)</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll#a96f691985c8546e826012fdc3481c88f034a194</link>
        <description>[Hexagon] Convert some tests to opaque pointers (NFC)

            List of files:
            /llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll</description>
        <pubDate>Mon, 19 Dec 2022 11:52:45 +0000</pubDate>
        <dc:creator>Nikita Popov &lt;npopov@redhat.com&gt;</dc:creator>
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<item>
        <title>44c1f81b27cfc183b6e1cde50942a0eb3d62a03b - [Hexagon] Switch to auto-generated intrinsic definitions and patterns</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll#44c1f81b27cfc183b6e1cde50942a0eb3d62a03b</link>
        <description>[Hexagon] Switch to auto-generated intrinsic definitions and patternsllvm-svn: 348206

            List of files:
            /llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll</description>
        <pubDate>Mon, 03 Dec 2018 22:40:36 +0000</pubDate>
        <dc:creator>Krzysztof Parzyszek &lt;kparzysz@codeaurora.org&gt;</dc:creator>
    </item>
<item>
        <title>c9f797fdd08e07167d43690a082920af4b09be74 - [Hexagon] Remove {{ *}} from testcases</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll#c9f797fdd08e07167d43690a082920af4b09be74</link>
        <description>[Hexagon] Remove {{ *}} from testcasesThe spaces in the instructions are now consistent.llvm-svn: 326829

            List of files:
            /llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll</description>
        <pubDate>Tue, 06 Mar 2018 19:07:21 +0000</pubDate>
        <dc:creator>Krzysztof Parzyszek &lt;kparzysz@codeaurora.org&gt;</dc:creator>
    </item>
<item>
        <title>e1983bcf552980433a7a8ed7a2ae31ded4ae9b4a - [Hexagon] New HVX target features.</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll#e1983bcf552980433a7a8ed7a2ae31ded4ae9b4a</link>
        <description>[Hexagon] New HVX target features.This patch lets the llvm tools handle the new HVX target features thatare added by frontend (clang). The target-features are of the form&quot;hvx-length64b&quot; for 64 Byte HVX mode, &quot;hvx-length128b&quot; for 128 Byte mode HVX.&quot;hvx-double&quot; is an alias to &quot;hvx-length128b&quot; and is soon will be deprecated.The hvx version target feature is upgated form &quot;+hvx&quot; to &quot;+hvxv{version_number}.Eg: &quot;+hvxv62&quot;For the correct HVX code generation, the user must use the followingtarget features.For 64B mode: &quot;+hvxv62&quot; &quot;+hvx-length64b&quot;For 128B mode: &quot;+hvxv62&quot; &quot;+hvx-length128b&quot;Clang picks a default length if none is specified. If for some reason,no hvx-length is specified to llvm, the compilation will bail out.There is a corresponding clang patch.Differential Revision: https://reviews.llvm.org/D38851llvm-svn: 316101

            List of files:
            /llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll</description>
        <pubDate>Wed, 18 Oct 2017 18:07:07 +0000</pubDate>
        <dc:creator>Sumanth Gundapaneni &lt;sgundapa@codeaurora.org&gt;</dc:creator>
    </item>
<item>
        <title>9aaf9233768396b8c2b9315a2fc9df64dfb3bf81 - [Hexagon] Don&apos;t ignore mult-cycle latency information</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll#9aaf9233768396b8c2b9315a2fc9df64dfb3bf81</link>
        <description>[Hexagon] Don&apos;t ignore mult-cycle latency informationThe compiler was generating code that ends up ignoring a multiplelatency dependence between two instructions by scheduling theintructions in back-to-back packets. The packetizer needs to end a packet if the latency of the currentcurrent insruction and the source in the previous packet isgreater than 1 cycle. This case occurs when there is still room inthe current packet, but scheduling the instruction causes a stall.Instead, the packetizer should start a new packet. Also, if thecurrent packet already contains a stall, then it is okay to addanother instruction to the packet that also causes a stall. Thisoccurs when there are no instructions that can be scheduled inbetween the producer and consumer instructions.This patch changes the latency for loads to 2 cycles from 3 cycles.This change refects that a load only needs to be separated byone extra packet to eliminate the stall.Patch by Ikhlas Ajbar.llvm-svn: 301954

            List of files:
            /llvm-project/llvm/test/CodeGen/Hexagon/multi-cycle.ll</description>
        <pubDate>Tue, 02 May 2017 18:12:19 +0000</pubDate>
        <dc:creator>Krzysztof Parzyszek &lt;kparzysz@codeaurora.org&gt;</dc:creator>
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