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    <title>Changes in inline-asm-a.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
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        <title>2208c97c1bec2512d4e47b6223db6d95a7037956 - [Hexagon,test] Change llc -march= to -mtriple=</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/inline-asm-a.ll#2208c97c1bec2512d4e47b6223db6d95a7037956</link>
        <description>[Hexagon,test] Change llc -march= to -mtriple=Similar to 806761a7629df268c8aed49657aeccffa6bca449-mtriple= specifies the full target triple while -march= merely sets thearchitecture part of the default target triple, leaving a target triple whichmay not make sense.Therefore, -march= is error-prone and not recommended for tests without a targettriple. The issue has been benign as we recognize $unknown-apple-darwin as ELF insteadof rejecting it outrightly.

            List of files:
            /llvm-project/llvm/test/CodeGen/Hexagon/inline-asm-a.ll</description>
        <pubDate>Sun, 15 Dec 2024 18:20:22 +0000</pubDate>
        <dc:creator>Fangrui Song &lt;i@maskray.me&gt;</dc:creator>
    </item>
<item>
        <title>a96f691985c8546e826012fdc3481c88f034a194 - [Hexagon] Convert some tests to opaque pointers (NFC)</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/inline-asm-a.ll#a96f691985c8546e826012fdc3481c88f034a194</link>
        <description>[Hexagon] Convert some tests to opaque pointers (NFC)

            List of files:
            /llvm-project/llvm/test/CodeGen/Hexagon/inline-asm-a.ll</description>
        <pubDate>Mon, 19 Dec 2022 11:52:45 +0000</pubDate>
        <dc:creator>Nikita Popov &lt;npopov@redhat.com&gt;</dc:creator>
    </item>
<item>
        <title>3ad0d01e9e7c71a9de714380f232b45d7c8147fe - [Hexagon] Add inline-asm constraint &apos;a&apos; for modifier register class</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/inline-asm-a.ll#3ad0d01e9e7c71a9de714380f232b45d7c8147fe</link>
        <description>[Hexagon] Add inline-asm constraint &apos;a&apos; for modifier register classFor example  asm (&quot;memw(%0++%1) = %2&quot; : : &quot;r&quot;(addr),&quot;a&quot;(mod),&quot;r&quot;(val) : &quot;memory&quot;)llvm-svn: 308761

            List of files:
            /llvm-project/llvm/test/CodeGen/Hexagon/inline-asm-a.ll</description>
        <pubDate>Fri, 21 Jul 2017 17:51:27 +0000</pubDate>
        <dc:creator>Krzysztof Parzyszek &lt;kparzysz@codeaurora.org&gt;</dc:creator>
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