en Copyright 2015 Java http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll#2208c97c1bec2512d4e47b6223db6d95a7037956 [Hexagon,test] Change llc -march= to -mtriple=Similar to 806761a7629df268c8aed49657aeccffa6bca449-mtriple= specifies the full target triple while -march= merely sets thearchitecture part of the default target triple, leaving a target triple whichmay not make sense.Therefore, -march= is error-prone and not recommended for tests without a targettriple. The issue has been benign as we recognize $unknown-apple-darwin as ELF insteadof rejecting it outrightly. List of files: /llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll Sun, 15 Dec 2024 18:20:22 +0000 Fangrui Song <i@maskray.me> http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll#a96f691985c8546e826012fdc3481c88f034a194 [Hexagon] Convert some tests to opaque pointers (NFC) List of files: /llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll Mon, 19 Dec 2022 11:52:45 +0000 Nikita Popov <npopov@redhat.com> http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll#d91a9e27a987fa3e314c6d536b767e50195bb5a8 [Hexagon] Simplify CFG after atomic expansionThis will remove suboptimal branching from the generated ll/sc loops.The extra simplification pass affects a lot of testcases, which havebeen modified to accommodate this change: either by modifying thetest to become immune to the CFG simplification, or (less preferablt)by adding option -hexagon-initial-cfg-clenaup=0.llvm-svn: 338774 List of files: /llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll Thu, 02 Aug 2018 22:17:53 +0000 Krzysztof Parzyszek <kparzysz@codeaurora.org> http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll#18484de34b26e424e5863a36f26eaa1288036d42 [Hexagon] Update more testcasesllvm-svn: 326830 List of files: /llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll Tue, 06 Mar 2018 19:15:58 +0000 Krzysztof Parzyszek <kparzysz@codeaurora.org> http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll#e1983bcf552980433a7a8ed7a2ae31ded4ae9b4a [Hexagon] New HVX target features.This patch lets the llvm tools handle the new HVX target features thatare added by frontend (clang). The target-features are of the form"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX."hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.Eg: "+hvxv62"For the correct HVX code generation, the user must use the followingtarget features.For 64B mode: "+hvxv62" "+hvx-length64b"For 128B mode: "+hvxv62" "+hvx-length128b"Clang picks a default length if none is specified. If for some reason,no hvx-length is specified to llvm, the compilation will bail out.There is a corresponding clang patch.Differential Revision: https://reviews.llvm.org/D38851llvm-svn: 316101 List of files: /llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll Wed, 18 Oct 2017 18:07:07 +0000 Sumanth Gundapaneni <sgundapa@codeaurora.org> http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll#5da24e549553bc6b61ac204b0128773ec165fdd0 [Hexagon] Equally-sized vectors are equivalent in ISel (except vNi1)llvm-svn: 273885 List of files: /llvm-project/llvm/test/CodeGen/Hexagon/bitconvert-vector.ll Mon, 27 Jun 2016 15:08:22 +0000 Krzysztof Parzyszek <kparzysz@codeaurora.org>