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    <title>Changes in simplify-patchable-liveness-bug.ll</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>27026fe5633b546ed647efd99eccdfc598686535 - [BPF] Reset machine register kill mark in BPFMISimplifyPatchable</title>
        <link>http://src.rcs.uwaterloo.ca:8080/source/history/llvm-project/llvm/test/CodeGen/BPF/CORE/simplify-patchable-liveness-bug.ll#27026fe5633b546ed647efd99eccdfc598686535</link>
        <description>[BPF] Reset machine register kill mark in BPFMISimplifyPatchableWhen LLVM is build with `LLVM_ENABLE_EXPENSIVE_CHECKS=ON` optionthe following C code snippet:    struct t {      unsigned long a;    } __attribute__((preserve_access_index));    void foo(volatile struct t *t, volatile unsigned long *p) {      *p = t-&gt;a;      *p = t-&gt;a;    }Causes an assertion:    $ clang -g -O2 -c --target=bpf -mcpu=v2 t2.c -o /dev/null    # After BPF PreEmit SimplifyPatchable    # Machine code for function foo: IsSSA, TracksLiveness    Function Live Ins: $r1 in %0, $r2 in %1    bb.0.entry:      liveins: $r1, $r2      DBG_VALUE $r1, $noreg, !&quot;t&quot;, !DIExpression()      DBG_VALUE $r2, $noreg, !&quot;p&quot;, !DIExpression()      %1:gpr = COPY $r2      DBG_VALUE %1:gpr, $noreg, !&quot;p&quot;, !DIExpression()      %0:gpr = COPY $r1      DBG_VALUE %0:gpr, $noreg, !&quot;t&quot;, !DIExpression()      %2:gpr = LD_imm64 @&quot;llvm.t:0:0$0:0&quot;      %4:gpr = ADD_rr %0:gpr(tied-def 0), killed %2:gpr      %5:gpr = CORE_LD 344, %0:gpr, @&quot;llvm.t:0:0$0:0&quot;      STD killed %5:gpr, %1:gpr, 0      %7:gpr = ADD_rr %0:gpr(tied-def 0), killed %2:gpr      %8:gpr = CORE_LD 344, %0:gpr, @&quot;llvm.t:0:0$0:0&quot;      STD killed %8:gpr, %1:gpr, 0      RET    # End machine code for function foo.    *** Bad machine code: Using a killed virtual register ***    - function:    foo    - basic block: %bb.0 entry (0x6210000e6690)    - instruction: %7:gpr = ADD_rr %0:gpr(tied-def 0), killed %2:gpr    - operand 2:   killed %2:gprThis happens because of the wayBPFMISimplifyPatchable::processDstReg() updates second operand of the`ADD_rr` instruction. Code before `BPFMISimplifyPatchable`:    .-&gt; %2:gpr = LD_imm64 @&quot;llvm.t:0:0$0:0&quot;    |    |`----------------.    |   %3:gpr = LDD %2:gpr, 0    |   %4:gpr = ADD_rr %0:gpr(tied-def 0), killed %3:gpr &lt;--- (1)    |   %5:gpr = LDD killed %4:gpr, 0       ^^^^^^^^^^^^^    |   STD killed %5:gpr, %1:gpr, 0        this is updated     `----------------.        %6:gpr = LDD %2:gpr, 0        %7:gpr = ADD_rr %0:gpr(tied-def 0), killed %6:gpr &lt;--- (2)        %8:gpr = LDD killed %7:gpr, 0       ^^^^^^^^^^^^^        STD killed %8:gpr, %1:gpr, 0        this is updatedInstructions (1) and (2) would be updated to:    ADD_rr %0:gpr(tied-def 0), killed %2:gprThe `killed` mark is inherited from machine operands `killed %3:gpr`and `killed %6:gpr` which are updated inplace by `processDstReg()`.This commit updates `processDstReg()` reset kill marks for updatedmachine operands to keep liveness information conservatively correct.Differential Revision: https://reviews.llvm.org/D157805

            List of files:
            /llvm-project/llvm/test/CodeGen/BPF/CORE/simplify-patchable-liveness-bug.ll</description>
        <pubDate>Sun, 13 Aug 2023 00:11:37 +0000</pubDate>
        <dc:creator>Eduard Zingerman &lt;eddyz87@gmail.com&gt;</dc:creator>
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