; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 ; RUN: opt -S -passes=loop-unroll -unroll-allow-partial < %s | FileCheck %s declare void @use(i8) define void @test(i8 %start1, i8 %start2, i8 %start3, i8 %start4) { ; CHECK-LABEL: define void @test ; CHECK-SAME: (i8 [[START1:%.*]], i8 [[START2:%.*]], i8 [[START3:%.*]], i8 [[START4:%.*]]) { ; CHECK-NEXT: entry: ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT_4:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[IV1:%.*]] = phi i8 [ [[START1]], [[ENTRY]] ], [ [[IV1_NEXT_4:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[IV2:%.*]] = phi i8 [ [[START2]], [[ENTRY]] ], [ [[IV2_NEXT_4:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[IV3:%.*]] = phi i8 [ [[START3]], [[ENTRY]] ], [ [[IV3_NEXT_4:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[IV4:%.*]] = phi i8 [ [[START4]], [[ENTRY]] ], [ [[IV4_NEXT_4:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[IV1_NEXT:%.*]] = add i8 [[IV1]], 1 ; CHECK-NEXT: call void @use(i8 [[IV1_NEXT]]) ; CHECK-NEXT: [[IV2_NEXT:%.*]] = add nuw i8 [[IV2]], 1 ; CHECK-NEXT: call void @use(i8 [[IV2_NEXT]]) ; CHECK-NEXT: [[IV3_NEXT:%.*]] = add nsw i8 [[IV3]], 1 ; CHECK-NEXT: call void @use(i8 [[IV3_NEXT]]) ; CHECK-NEXT: [[IV4_NEXT:%.*]] = add nsw i8 [[IV4]], 127 ; CHECK-NEXT: call void @use(i8 [[IV4_NEXT]]) ; CHECK-NEXT: [[IV1_NEXT_1:%.*]] = add i8 [[IV1]], 2 ; CHECK-NEXT: call void @use(i8 [[IV1_NEXT_1]]) ; CHECK-NEXT: [[IV2_NEXT_1:%.*]] = add nuw i8 [[IV2]], 2 ; CHECK-NEXT: call void @use(i8 [[IV2_NEXT_1]]) ; CHECK-NEXT: [[IV3_NEXT_1:%.*]] = add nsw i8 [[IV3]], 2 ; CHECK-NEXT: call void @use(i8 [[IV3_NEXT_1]]) ; CHECK-NEXT: [[IV4_NEXT_1:%.*]] = add i8 [[IV4]], -2 ; CHECK-NEXT: call void @use(i8 [[IV4_NEXT_1]]) ; CHECK-NEXT: [[IV1_NEXT_2:%.*]] = add i8 [[IV1]], 3 ; CHECK-NEXT: call void @use(i8 [[IV1_NEXT_2]]) ; CHECK-NEXT: [[IV2_NEXT_2:%.*]] = add nuw i8 [[IV2]], 3 ; CHECK-NEXT: call void @use(i8 [[IV2_NEXT_2]]) ; CHECK-NEXT: [[IV3_NEXT_2:%.*]] = add nsw i8 [[IV3]], 3 ; CHECK-NEXT: call void @use(i8 [[IV3_NEXT_2]]) ; CHECK-NEXT: [[IV4_NEXT_2:%.*]] = add i8 [[IV4]], 125 ; CHECK-NEXT: call void @use(i8 [[IV4_NEXT_2]]) ; CHECK-NEXT: [[IV1_NEXT_3:%.*]] = add i8 [[IV1]], 4 ; CHECK-NEXT: call void @use(i8 [[IV1_NEXT_3]]) ; CHECK-NEXT: [[IV2_NEXT_3:%.*]] = add nuw i8 [[IV2]], 4 ; CHECK-NEXT: call void @use(i8 [[IV2_NEXT_3]]) ; CHECK-NEXT: [[IV3_NEXT_3:%.*]] = add nsw i8 [[IV3]], 4 ; CHECK-NEXT: call void @use(i8 [[IV3_NEXT_3]]) ; CHECK-NEXT: [[IV4_NEXT_3:%.*]] = add i8 [[IV4]], -4 ; CHECK-NEXT: call void @use(i8 [[IV4_NEXT_3]]) ; CHECK-NEXT: [[IV_NEXT_3:%.*]] = add nuw nsw i32 [[IV]], 4 ; CHECK-NEXT: [[IV1_NEXT_4]] = add i8 [[IV1]], 5 ; CHECK-NEXT: call void @use(i8 [[IV1_NEXT_4]]) ; CHECK-NEXT: [[IV2_NEXT_4]] = add nuw i8 [[IV2]], 5 ; CHECK-NEXT: call void @use(i8 [[IV2_NEXT_4]]) ; CHECK-NEXT: [[IV3_NEXT_4]] = add nsw i8 [[IV3]], 5 ; CHECK-NEXT: call void @use(i8 [[IV3_NEXT_4]]) ; CHECK-NEXT: [[IV4_NEXT_4]] = add i8 [[IV4]], 123 ; CHECK-NEXT: call void @use(i8 [[IV4_NEXT_4]]) ; CHECK-NEXT: [[IV_NEXT_4]] = add nuw nsw i32 [[IV]], 5 ; CHECK-NEXT: [[CMP_4:%.*]] = icmp eq i32 [[IV_NEXT_3]], 1024 ; CHECK-NEXT: br i1 [[CMP_4]], label [[EXIT:%.*]], label [[LOOP]] ; CHECK: exit: ; CHECK-NEXT: ret void ; entry: br label %loop loop: %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] %iv1 = phi i8 [ %start1, %entry ], [ %iv1.next, %loop ] %iv2 = phi i8 [ %start2, %entry ], [ %iv2.next, %loop ] %iv3 = phi i8 [ %start3, %entry ], [ %iv3.next, %loop ] %iv4 = phi i8 [ %start4, %entry ], [ %iv4.next, %loop ] %iv1.next = add i8 %iv1, 1 call void @use(i8 %iv1.next) %iv2.next = add nuw i8 %iv2, 1 call void @use(i8 %iv2.next) %iv3.next = add nsw i8 %iv3, 1 call void @use(i8 %iv3.next) %iv4.next = add nsw i8 %iv4, 127 call void @use(i8 %iv4.next) %iv.next = add i32 %iv, 1 %cmp = icmp eq i32 %iv, 1024 br i1 %cmp, label %exit, label %loop exit: ret void }