Lines Matching refs:value
45 /* Current phase tag value */
130 get_pcie_reg_4(struct nvme_ctrlr *ctrlr, uint32_t offset, uint32_t *value)
133 *value = spdk_mmio_read_4(get_pcie_reg_addr(ctrlr, offset));
137 get_pcie_reg_8(struct nvme_ctrlr *ctrlr, uint32_t offset, uint64_t *value)
140 *value = spdk_mmio_read_8(get_pcie_reg_addr(ctrlr, offset));
144 set_pcie_reg_4(struct nvme_ctrlr *ctrlr, uint32_t offset, uint32_t value)
147 spdk_mmio_write_4(get_pcie_reg_addr(ctrlr, offset), value);
151 set_pcie_reg_8(struct nvme_ctrlr *ctrlr, uint32_t offset, uint64_t value)
154 spdk_mmio_write_8(get_pcie_reg_addr(ctrlr, offset), value);
182 nvme_ctrlr_set_asq(struct nvme_ctrlr *ctrlr, uint64_t value)
184 set_pcie_reg_8(ctrlr, offsetof(struct spdk_nvme_registers, asq), value);
188 nvme_ctrlr_set_acq(struct nvme_ctrlr *ctrlr, uint64_t value)
190 set_pcie_reg_8(ctrlr, offsetof(struct spdk_nvme_registers, acq), value);