157 	pci_chipset_tag_t pc = pa->pa_pc;  in ppbattach()  local
166 	sc->sc_pc = pc;  in ppbattach()
169 	busdata = pci_conf_read(pc, pa->pa_tag, PPB_REG_BUSINFO);  in ppbattach()
216 	if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PCIEXPRESS,  in ppbattach()
225 			sc->sc_intrhand = pci_intr_establish(pc, ih, IPL_BIO,  in ppbattach()
230 			sc->sc_intrhand = pci_intr_establish(pc, ih, IPL_BIO,  in ppbattach()
235 			printf(": %s", pci_intr_string(pc, ih));  in ppbattach()
238 			reg = pci_conf_read(pc, pa->pa_tag,  in ppbattach()
241 			pci_conf_write(pc, pa->pa_tag,  in ppbattach()
277 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_IOSTATUS);  in ppbattach()
280 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_IO_HI);  in ppbattach()
295 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_MEM);  in ppbattach()
311 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFMEM);  in ppbattach()
315 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFBASE_HI32);  in ppbattach()
317 	blr = pci_conf_read(pc, pa->pa_tag, PPB_REG_PREFLIM_HI32);  in ppbattach()
351 	pba.pba_pc = pc;  in ppbattach()
414 	pci_chipset_tag_t pc = sc->sc_pc;  in ppbactivate()  local
424 		sc->sc_csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);  in ppbactivate()
425 		sc->sc_bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);  in ppbactivate()
426 		sc->sc_bir = pci_conf_read(pc, tag, PPB_REG_BUSINFO);  in ppbactivate()
427 		sc->sc_bcr = pci_conf_read(pc, tag, PPB_REG_BRIDGECONTROL);  in ppbactivate()
428 		sc->sc_int = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);  in ppbactivate()
430 			sc->sc_slcsr = pci_conf_read(pc, tag,  in ppbactivate()
433 		if (pci_get_capability(pc, tag, PCI_CAP_MSI, &off, &reg)) {  in ppbactivate()
434 			sc->sc_msi_ma = pci_conf_read(pc, tag,  in ppbactivate()
437 				sc->sc_msi_mau32 = pci_conf_read(pc, tag,  in ppbactivate()
439 				sc->sc_msi_md = pci_conf_read(pc, tag,  in ppbactivate()
442 				sc->sc_msi_md = pci_conf_read(pc, tag,  in ppbactivate()
451 			pci_set_powerstate(pc, tag, sc->sc_pmcsr_state);  in ppbactivate()
455 		pci_conf_write(pc, tag, PCI_BHLC_REG, sc->sc_bhlcr);  in ppbactivate()
456 		pci_conf_write(pc, tag, PPB_REG_BUSINFO, sc->sc_bir);  in ppbactivate()
457 		pci_conf_write(pc, tag, PPB_REG_BRIDGECONTROL, sc->sc_bcr);  in ppbactivate()
458 		pci_conf_write(pc, tag, PCI_INTERRUPT_REG, sc->sc_int);  in ppbactivate()
460 			pci_conf_write(pc, tag,  in ppbactivate()
464 		blr = pci_conf_read(pc, tag, PPB_REG_IOSTATUS);  in ppbactivate()
468 		pci_conf_write(pc, tag, PPB_REG_IOSTATUS, blr);  in ppbactivate()
471 		pci_conf_write(pc, tag, PPB_REG_IO_HI, blr);  in ppbactivate()
476 		pci_conf_write(pc, tag, PPB_REG_MEM, blr);  in ppbactivate()
481 		pci_conf_write(pc, tag, PPB_REG_PREFMEM, blr);  in ppbactivate()
483 		pci_conf_write(pc, tag, PPB_REG_PREFBASE_HI32,  in ppbactivate()
485 		pci_conf_write(pc, tag, PPB_REG_PREFLIM_HI32,  in ppbactivate()
489 		if (pci_get_capability(pc, tag, PCI_CAP_MSI, &off, &reg)) {  in ppbactivate()
490 			pci_conf_write(pc, tag, off + PCI_MSI_MA,  in ppbactivate()
493 				pci_conf_write(pc, tag, off + PCI_MSI_MAU32,  in ppbactivate()
495 				pci_conf_write(pc, tag, off + PCI_MSI_MD64,  in ppbactivate()
498 				pci_conf_write(pc, tag, off + PCI_MSI_MD32,  in ppbactivate()
501 			pci_conf_write(pc, tag, off + PCI_MSI_MC,  in ppbactivate()
509 		reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);  in ppbactivate()
510 		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,  in ppbactivate()
523 			sc->sc_pmcsr_state = pci_get_powerstate(pc, tag);  in ppbactivate()
524 			pci_set_powerstate(pc, tag,  in ppbactivate()
525 			    pci_min_powerstate(pc, tag));  in ppbactivate()
539 	pci_chipset_tag_t pc = sc->sc_pc;  in ppb_alloc_busrange()  local
568 		pci_conf_write(pc, pa->pa_tag, PPB_REG_BUSINFO, *busdata);  in ppb_alloc_busrange()
575 	pci_chipset_tag_t pc = sc->sc_pc;  in ppb_alloc_resources()  local
589 	busdata = pci_conf_read(pc, sc->sc_tag, PPB_REG_BUSINFO);  in ppb_alloc_resources()
599 	for (dev = 0; dev < pci_bus_maxdevs(pc, bus); dev++) {  in ppb_alloc_resources()
600 		tag = pci_make_tag(pc, bus, dev, 0);  in ppb_alloc_resources()
601 		id = pci_conf_read(pc, tag, PCI_ID_REG);  in ppb_alloc_resources()
607 		bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);  in ppb_alloc_resources()
633 			if (pci_mapreg_probe(pc, tag, reg, &type) == 0)  in ppb_alloc_resources()
647 			addr = pci_conf_read(pc, tag, reg_rom);  in ppb_alloc_resources()
648 			pci_conf_write(pc, tag, reg_rom, ~PCI_ROM_ENABLE);  in ppb_alloc_resources()
649 			mask = pci_conf_read(pc, tag, reg_rom);  in ppb_alloc_resources()
650 			pci_conf_write(pc, tag, reg_rom, addr);  in ppb_alloc_resources()
656 	csr = pci_conf_read(pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);  in ppb_alloc_resources()
663 		pci_conf_write(pc, sc->sc_tag, PPB_REG_MEM, 0x0000ffff);  in ppb_alloc_resources()
664 		pci_conf_write(pc, sc->sc_tag, PPB_REG_PREFMEM, 0x0000ffff);  in ppb_alloc_resources()
665 		pci_conf_write(pc, sc->sc_tag, PPB_REG_PREFBASE_HI32, 0);  in ppb_alloc_resources()
666 		pci_conf_write(pc, sc->sc_tag, PPB_REG_PREFLIM_HI32, 0);  in ppb_alloc_resources()
669 		pci_conf_write(pc, sc->sc_tag, PPB_REG_IOSTATUS, 0x000000ff);  in ppb_alloc_resources()
670 		pci_conf_write(pc, sc->sc_tag, PPB_REG_IO_HI, 0x0000ffff);  in ppb_alloc_resources()
675 		blr = pci_conf_read(pc, sc->sc_tag, PPB_REG_IOSTATUS);  in ppb_alloc_resources()
678 		blr = pci_conf_read(pc, sc->sc_tag, PPB_REG_IO_HI);  in ppb_alloc_resources()
691 				blr = pci_conf_read(pc, sc->sc_tag,  in ppb_alloc_resources()
696 				pci_conf_write(pc, sc->sc_tag,  in ppb_alloc_resources()
700 				pci_conf_write(pc, sc->sc_tag,  in ppb_alloc_resources()
710 		blr = pci_conf_read(pc, sc->sc_tag, PPB_REG_MEM);  in ppb_alloc_resources()
725 				pci_conf_write(pc, sc->sc_tag,  in ppb_alloc_resources()
736 	pci_conf_write(pc, sc->sc_tag, PCI_COMMAND_STATUS_REG, csr);  in ppb_alloc_resources()