Lines Matching refs:ucode
745 struct amdgpu_firmware_info *ucode, in amdgpu_ucode_init_single_fw() argument
758 if (!ucode->fw) in amdgpu_ucode_init_single_fw()
761 ucode->mc_addr = mc_addr; in amdgpu_ucode_init_single_fw()
762 ucode->kaddr = kptr; in amdgpu_ucode_init_single_fw()
764 if (ucode->ucode_id == AMDGPU_UCODE_ID_STORAGE) in amdgpu_ucode_init_single_fw()
767 header = (const struct common_firmware_header *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
768 cp_hdr = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
769 cpv2_hdr = (const struct gfx_firmware_header_v2_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
770 dmcu_hdr = (const struct dmcu_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
771 dmcub_hdr = (const struct dmcub_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
772 mes_hdr = (const struct mes_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
773 sdma_hdr = (const struct sdma_firmware_header_v2_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
774 imu_hdr = (const struct imu_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
777 switch (ucode->ucode_id) { in amdgpu_ucode_init_single_fw()
779 ucode->ucode_size = le32_to_cpu(sdma_hdr->ctx_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
780 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
784 ucode->ucode_size = le32_to_cpu(sdma_hdr->ctl_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
785 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
790 ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) - in amdgpu_ucode_init_single_fw()
792 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
797 ucode->ucode_size = le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_ucode_init_single_fw()
798 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
803 ucode->ucode_size = adev->gfx.rlc.save_restore_list_cntl_size_bytes; in amdgpu_ucode_init_single_fw()
807 ucode->ucode_size = adev->gfx.rlc.save_restore_list_gpm_size_bytes; in amdgpu_ucode_init_single_fw()
811 ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes; in amdgpu_ucode_init_single_fw()
815 ucode->ucode_size = adev->gfx.rlc.rlc_iram_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
819 ucode->ucode_size = adev->gfx.rlc.rlc_dram_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
823 ucode->ucode_size = adev->gfx.rlc.rlcp_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
827 ucode->ucode_size = adev->gfx.rlc.rlcv_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
831 ucode->ucode_size = adev->gfx.rlc.global_tap_delays_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
835 ucode->ucode_size = adev->gfx.rlc.se0_tap_delays_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
839 ucode->ucode_size = adev->gfx.rlc.se1_tap_delays_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
843 ucode->ucode_size = adev->gfx.rlc.se2_tap_delays_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
847 ucode->ucode_size = adev->gfx.rlc.se3_tap_delays_ucode_size_bytes; in amdgpu_ucode_init_single_fw()
851 ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
852 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
856 ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes); in amdgpu_ucode_init_single_fw()
857 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
861 ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
862 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
866 ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes); in amdgpu_ucode_init_single_fw()
867 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
871 ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) - in amdgpu_ucode_init_single_fw()
873 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
877 ucode->ucode_size = le32_to_cpu(dmcu_hdr->intv_size_bytes); in amdgpu_ucode_init_single_fw()
878 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
883 ucode->ucode_size = le32_to_cpu(dmcub_hdr->inst_const_bytes); in amdgpu_ucode_init_single_fw()
884 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
888 ucode->ucode_size = ucode->fw->size; in amdgpu_ucode_init_single_fw()
889 ucode_addr = (u8 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()
892 ucode->ucode_size = le32_to_cpu(imu_hdr->imu_iram_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
893 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
897 ucode->ucode_size = le32_to_cpu(imu_hdr->imu_dram_ucode_size_bytes); in amdgpu_ucode_init_single_fw()
898 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
903 ucode->ucode_size = le32_to_cpu(cpv2_hdr->ucode_size_bytes); in amdgpu_ucode_init_single_fw()
904 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
908 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
909 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
913 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
914 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
918 ucode->ucode_size = le32_to_cpu(cpv2_hdr->ucode_size_bytes); in amdgpu_ucode_init_single_fw()
919 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
923 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
924 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
928 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
929 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
933 ucode->ucode_size = le32_to_cpu(cpv2_hdr->ucode_size_bytes); in amdgpu_ucode_init_single_fw()
934 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
938 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
939 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
943 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
944 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
948 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
949 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
953 ucode->ucode_size = le32_to_cpu(cpv2_hdr->data_size_bytes); in amdgpu_ucode_init_single_fw()
954 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
958 ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes); in amdgpu_ucode_init_single_fw()
959 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
964 ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes); in amdgpu_ucode_init_single_fw()
965 ucode_addr = (u8 *)ucode->fw->data + in amdgpu_ucode_init_single_fw()
969 memcpy(ucode->kaddr, ucode_addr, ucode->ucode_size); in amdgpu_ucode_init_single_fw()
974 static int amdgpu_ucode_patch_jt(struct amdgpu_firmware_info *ucode, in amdgpu_ucode_patch_jt() argument
982 if (!ucode->fw) in amdgpu_ucode_patch_jt()
985 comm_hdr = (const struct common_firmware_header *)ucode->fw->data; in amdgpu_ucode_patch_jt()
986 header = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_patch_jt()
987 dst_addr = ucode->kaddr + in amdgpu_ucode_patch_jt()
990 src_addr = (uint8_t *)ucode->fw->data + in amdgpu_ucode_patch_jt()
1027 struct amdgpu_firmware_info *ucode = NULL; in amdgpu_ucode_init_bo() local
1046 ucode = &adev->firmware.ucode[i]; in amdgpu_ucode_init_bo()
1047 if (ucode->fw) { in amdgpu_ucode_init_bo()
1048 amdgpu_ucode_init_single_fw(adev, ucode, adev->firmware.fw_buf_mc + fw_offset, in amdgpu_ucode_init_bo()
1054 cp_hdr = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_bo()
1055 amdgpu_ucode_patch_jt(ucode, adev->firmware.fw_buf_mc + fw_offset, in amdgpu_ucode_init_bo()
1059 fw_offset += ALIGN(ucode->ucode_size, PAGE_SIZE); in amdgpu_ucode_init_bo()