480 	int phy = child->mii_phy;  in fec_phy_init()  local
486 		fec_miibus_writereg(dev, phy, 0x0d, 0x0003);  in fec_phy_init()
487 		fec_miibus_writereg(dev, phy, 0x0e, 0x805d);  in fec_phy_init()
488 		fec_miibus_writereg(dev, phy, 0x0d, 0x4003);  in fec_phy_init()
489 		reg = fec_miibus_readreg(dev, phy, 0x0e);  in fec_phy_init()
490 		fec_miibus_writereg(dev, phy, 0x0e, reg & ~0x0100);  in fec_phy_init()
493 		fec_miibus_writereg(dev, phy, 0x0d, 0x0007);  in fec_phy_init()
494 		fec_miibus_writereg(dev, phy, 0x0e, 0x8016);  in fec_phy_init()
495 		fec_miibus_writereg(dev, phy, 0x0d, 0x4007);  in fec_phy_init()
497 		reg = fec_miibus_readreg(dev, phy, 0x0e) & 0xffe3;  in fec_phy_init()
498 		fec_miibus_writereg(dev, phy, 0x0e, reg | 0x18);  in fec_phy_init()
501 		fec_miibus_writereg(dev, phy, 0x1d, 0x0005);  in fec_phy_init()
502 		reg = fec_miibus_readreg(dev, phy, 0x1e);  in fec_phy_init()
503 		fec_miibus_writereg(dev, phy, 0x1e, reg | 0x0100);  in fec_phy_init()
513 		uint32_t val, phy;  in fec_phy_init()  local
517 		phy = OF_getpropint(sc->sc_node, "phy-handle", 0);  in fec_phy_init()
518 		if (phy)  in fec_phy_init()
519 			node = OF_getnodebyphandle(phy);  in fec_phy_init()
535 		fec_miibus_writereg(dev, phy, 0x0b, 0x8104);  in fec_phy_init()
536 		fec_miibus_writereg(dev, phy, 0x0c, val);  in fec_phy_init()
540 		fec_miibus_writereg(dev, phy, 0x0b, 0x8105);  in fec_phy_init()
541 		fec_miibus_writereg(dev, phy, 0x0c, val);  in fec_phy_init()
545 		fec_miibus_writereg(dev, phy, 0x0b, 0x8106);  in fec_phy_init()
546 		fec_miibus_writereg(dev, phy, 0x0c, val);  in fec_phy_init()
554 		uint32_t val, phy;  in fec_phy_init()  local
558 		phy = OF_getpropint(sc->sc_node, "phy-handle", 0);  in fec_phy_init()
559 		if (phy)  in fec_phy_init()
560 			node = OF_getnodebyphandle(phy);  in fec_phy_init()
575 		fec_miibus_writereg(dev, phy, 0x0d, 0x0002);  in fec_phy_init()
576 		fec_miibus_writereg(dev, phy, 0x0e, 0x0004);  in fec_phy_init()
577 		fec_miibus_writereg(dev, phy, 0x0d, 0x4002);  in fec_phy_init()
578 		fec_miibus_writereg(dev, phy, 0x0e, val);  in fec_phy_init()
582 		fec_miibus_writereg(dev, phy, 0x0d, 0x0002);  in fec_phy_init()
583 		fec_miibus_writereg(dev, phy, 0x0e, 0x0005);  in fec_phy_init()
584 		fec_miibus_writereg(dev, phy, 0x0d, 0x4002);  in fec_phy_init()
585 		fec_miibus_writereg(dev, phy, 0x0e, val);  in fec_phy_init()
589 		fec_miibus_writereg(dev, phy, 0x0d, 0x0002);  in fec_phy_init()
590 		fec_miibus_writereg(dev, phy, 0x0e, 0x0006);  in fec_phy_init()
591 		fec_miibus_writereg(dev, phy, 0x0d, 0x4002);  in fec_phy_init()
592 		fec_miibus_writereg(dev, phy, 0x0e, val);  in fec_phy_init()
595 		fec_miibus_writereg(dev, phy, 0x0d, 0x0002);  in fec_phy_init()
596 		fec_miibus_writereg(dev, phy, 0x0e, 0x0008);  in fec_phy_init()
597 		fec_miibus_writereg(dev, phy, 0x0d, 0x4002);  in fec_phy_init()
598 		fec_miibus_writereg(dev, phy, 0x0e, val);  in fec_phy_init()
1168 fec_miibus_readreg(struct device *dev, int phy, int reg)  in fec_miibus_readreg()  argument
1177 	    phy << ENET_MMFR_PA_SHIFT | reg << ENET_MMFR_RA_SHIFT);  in fec_miibus_readreg()
1187 fec_miibus_writereg(struct device *dev, int phy, int reg, int val)  in fec_miibus_writereg()  argument
1195 	    phy << ENET_MMFR_PA_SHIFT | reg << ENET_MMFR_RA_SHIFT |  in fec_miibus_writereg()