Lines Matching refs:FP
70 #define FP (NoSuf|IgnoreSize) macro
579 {"fld", 1, 0xd9c0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
586 {"fildd", 1, 0xdf, 5, 0, FP|Modrm, { LLongMem, 0, 0} },
587 {"fildq", 1, 0xdf, 5, 0, FP|Modrm, { LLongMem, 0, 0} },
588 {"fildll", 1, 0xdf, 5, 0, FP|Modrm, { LLongMem, 0, 0} },
589 {"fldt", 1, 0xdb, 5, 0, FP|Modrm, { LLongMem, 0, 0} },
590 {"fbld", 1, 0xdf, 4, 0, FP|Modrm, { LLongMem, 0, 0} },
593 {"fst", 1, 0xddd0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
599 {"fstp", 1, 0xddd8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
606 {"fistpd", 1, 0xdf, 7, 0, FP|Modrm, { LLongMem, 0, 0} },
607 {"fistpq", 1, 0xdf, 7, 0, FP|Modrm, { LLongMem, 0, 0} },
608 {"fistpll",1, 0xdf, 7, 0, FP|Modrm, { LLongMem, 0, 0} },
609 {"fstpt", 1, 0xdb, 7, 0, FP|Modrm, { LLongMem, 0, 0} },
610 {"fbstp", 1, 0xdf, 6, 0, FP|Modrm, { LLongMem, 0, 0} },
613 {"fxch", 1, 0xd9c8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
615 {"fxch", 0, 0xd9c9, X, 0, FP, { 0, 0, 0} },
618 {"fcom", 1, 0xd8d0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
620 {"fcom", 0, 0xd8d1, X, 0, FP, { 0, 0, 0} },
626 {"fcomp", 1, 0xd8d8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
628 {"fcomp", 0, 0xd8d9, X, 0, FP, { 0, 0, 0} },
632 {"fcompp", 0, 0xded9, X, 0, FP, { 0, 0, 0} },
635 {"fucom", 1, 0xdde0, X, Cpu286, FP|ShortForm, { FloatReg, 0, 0} },
637 {"fucom", 0, 0xdde1, X, Cpu286, FP, { 0, 0, 0} },
638 {"fucomp", 1, 0xdde8, X, Cpu286, FP|ShortForm, { FloatReg, 0, 0} },
640 {"fucomp", 0, 0xdde9, X, Cpu286, FP, { 0, 0, 0} },
641 {"fucompp",0, 0xdae9, X, Cpu286, FP, { 0, 0, 0} },
643 {"ftst", 0, 0xd9e4, X, 0, FP, { 0, 0, 0} },
644 {"fxam", 0, 0xd9e5, X, 0, FP, { 0, 0, 0} },
647 {"fld1", 0, 0xd9e8, X, 0, FP, { 0, 0, 0} },
648 {"fldl2t", 0, 0xd9e9, X, 0, FP, { 0, 0, 0} },
649 {"fldl2e", 0, 0xd9ea, X, 0, FP, { 0, 0, 0} },
650 {"fldpi", 0, 0xd9eb, X, 0, FP, { 0, 0, 0} },
651 {"fldlg2", 0, 0xd9ec, X, 0, FP, { 0, 0, 0} },
652 {"fldln2", 0, 0xd9ed, X, 0, FP, { 0, 0, 0} },
653 {"fldz", 0, 0xd9ee, X, 0, FP, { 0, 0, 0} },
658 {"fadd", 2, 0xd8c0, X, 0, FP|ShortForm|FloatD, { FloatReg, FloatAcc, 0} },
660 {"fadd", 1, 0xd8c0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
663 {"fadd", 0, 0xdec1, X, 0, FP|Ugh, { 0, 0, 0} },
668 {"faddp", 2, 0xdec0, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} },
669 {"faddp", 1, 0xdec0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
671 {"faddp", 0, 0xdec1, X, 0, FP, { 0, 0, 0} },
672 {"faddp", 2, 0xdec0, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
675 {"fsub", 2, 0xd8e0, X, 0, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} },
676 {"fsub", 1, 0xd8e0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
679 {"fsub", 0, 0xdee1, X, 0, FP|Ugh, { 0, 0, 0} },
685 {"fsubp", 2, 0xdee0, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} },
686 {"fsubp", 1, 0xdee0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
687 {"fsubp", 0, 0xdee1, X, 0, FP, { 0, 0, 0} },
689 {"fsubp", 2, 0xdee0, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
692 {"fsubp", 2, 0xdee8, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} },
693 {"fsubp", 1, 0xdee8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
694 {"fsubp", 0, 0xdee9, X, 0, FP, { 0, 0, 0} },
698 {"fsubr", 2, 0xd8e8, X, 0, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} },
699 {"fsubr", 1, 0xd8e8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
702 {"fsubr", 0, 0xdee9, X, 0, FP|Ugh, { 0, 0, 0} },
708 {"fsubrp", 2, 0xdee8, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} },
709 {"fsubrp", 1, 0xdee8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
710 {"fsubrp", 0, 0xdee9, X, 0, FP, { 0, 0, 0} },
712 {"fsubrp", 2, 0xdee8, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
715 {"fsubrp", 2, 0xdee0, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} },
716 {"fsubrp", 1, 0xdee0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
717 {"fsubrp", 0, 0xdee1, X, 0, FP, { 0, 0, 0} },
721 {"fmul", 2, 0xd8c8, X, 0, FP|ShortForm|FloatD, { FloatReg, FloatAcc, 0} },
722 {"fmul", 1, 0xd8c8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
725 {"fmul", 0, 0xdec9, X, 0, FP|Ugh, { 0, 0, 0} },
730 {"fmulp", 2, 0xdec8, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} },
731 {"fmulp", 1, 0xdec8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
732 {"fmulp", 0, 0xdec9, X, 0, FP, { 0, 0, 0} },
733 {"fmulp", 2, 0xdec8, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
736 {"fdiv", 2, 0xd8f0, X, 0, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} },
737 {"fdiv", 1, 0xd8f0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
740 {"fdiv", 0, 0xdef1, X, 0, FP|Ugh, { 0, 0, 0} },
746 {"fdivp", 2, 0xdef0, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} },
747 {"fdivp", 1, 0xdef0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
748 {"fdivp", 0, 0xdef1, X, 0, FP, { 0, 0, 0} },
750 {"fdivp", 2, 0xdef0, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
753 {"fdivp", 2, 0xdef8, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} },
754 {"fdivp", 1, 0xdef8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
755 {"fdivp", 0, 0xdef9, X, 0, FP, { 0, 0, 0} },
759 {"fdivr", 2, 0xd8f8, X, 0, FP|ShortForm|FloatDR, { FloatReg, FloatAcc, 0} },
760 {"fdivr", 1, 0xd8f8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
763 {"fdivr", 0, 0xdef9, X, 0, FP|Ugh, { 0, 0, 0} },
769 {"fdivrp", 2, 0xdef8, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} },
770 {"fdivrp", 1, 0xdef8, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
771 {"fdivrp", 0, 0xdef9, X, 0, FP, { 0, 0, 0} },
773 {"fdivrp", 2, 0xdef8, X, 0, FP|ShortForm|Ugh, { FloatReg, FloatAcc, 0} },
776 {"fdivrp", 2, 0xdef0, X, 0, FP|ShortForm, { FloatAcc, FloatReg, 0} },
777 {"fdivrp", 1, 0xdef0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
778 {"fdivrp", 0, 0xdef1, X, 0, FP, { 0, 0, 0} },
781 {"f2xm1", 0, 0xd9f0, X, 0, FP, { 0, 0, 0} },
782 {"fyl2x", 0, 0xd9f1, X, 0, FP, { 0, 0, 0} },
783 {"fptan", 0, 0xd9f2, X, 0, FP, { 0, 0, 0} },
784 {"fpatan", 0, 0xd9f3, X, 0, FP, { 0, 0, 0} },
785 {"fxtract",0, 0xd9f4, X, 0, FP, { 0, 0, 0} },
786 {"fprem1", 0, 0xd9f5, X, Cpu286, FP, { 0, 0, 0} },
787 {"fdecstp",0, 0xd9f6, X, 0, FP, { 0, 0, 0} },
788 {"fincstp",0, 0xd9f7, X, 0, FP, { 0, 0, 0} },
789 {"fprem", 0, 0xd9f8, X, 0, FP, { 0, 0, 0} },
790 {"fyl2xp1",0, 0xd9f9, X, 0, FP, { 0, 0, 0} },
791 {"fsqrt", 0, 0xd9fa, X, 0, FP, { 0, 0, 0} },
792 {"fsincos",0, 0xd9fb, X, Cpu286, FP, { 0, 0, 0} },
793 {"frndint",0, 0xd9fc, X, 0, FP, { 0, 0, 0} },
794 {"fscale", 0, 0xd9fd, X, 0, FP, { 0, 0, 0} },
795 {"fsin", 0, 0xd9fe, X, Cpu286, FP, { 0, 0, 0} },
796 {"fcos", 0, 0xd9ff, X, Cpu286, FP, { 0, 0, 0} },
797 {"fchs", 0, 0xd9e0, X, 0, FP, { 0, 0, 0} },
798 {"fabs", 0, 0xd9e1, X, 0, FP, { 0, 0, 0} },
801 {"fninit", 0, 0xdbe3, X, 0, FP, { 0, 0, 0} },
802 {"finit", 0, 0xdbe3, X, 0, FP|FWait, { 0, 0, 0} },
803 {"fldcw", 1, 0xd9, 5, 0, FP|Modrm, { ShortMem, 0, 0} },
804 {"fnstcw", 1, 0xd9, 7, 0, FP|Modrm, { ShortMem, 0, 0} },
805 {"fstcw", 1, 0xd9, 7, 0, FP|FWait|Modrm, { ShortMem, 0, 0} },
806 {"fnstsw", 1, 0xdfe0, X, 0, FP, { Acc, 0, 0} },
807 {"fnstsw", 1, 0xdd, 7, 0, FP|Modrm, { ShortMem, 0, 0} },
808 {"fnstsw", 0, 0xdfe0, X, 0, FP, { 0, 0, 0} },
809 {"fstsw", 1, 0xdfe0, X, 0, FP|FWait, { Acc, 0, 0} },
810 {"fstsw", 1, 0xdd, 7, 0, FP|FWait|Modrm, { ShortMem, 0, 0} },
811 {"fstsw", 0, 0xdfe0, X, 0, FP|FWait, { 0, 0, 0} },
812 {"fnclex", 0, 0xdbe2, X, 0, FP, { 0, 0, 0} },
813 {"fclex", 0, 0xdbe2, X, 0, FP|FWait, { 0, 0, 0} },
822 {"ffree", 1, 0xddc0, X, 0, FP|ShortForm, { FloatReg, 0, 0} },
824 {"ffreep", 1, 0xdfc0, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} },
825 {"fnop", 0, 0xd9d0, X, 0, FP, { 0, 0, 0} },
827 {"fwait", 0, 0x9b, X, 0, FP, { 0, 0, 0} },
901 {"fxsave", 1, 0x0fae, 0, Cpu686, FP|Modrm, { LLongMem, 0, 0} },
902 {"fxrstor", 1, 0x0fae, 1, Cpu686, FP|Modrm, { LLongMem, 0, 0} },
953 {"fcmovb", 2, 0xdac0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
954 {"fcmovnae",2, 0xdac0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
955 {"fcmove", 2, 0xdac8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
956 {"fcmovbe", 2, 0xdad0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
957 {"fcmovna", 2, 0xdad0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
958 {"fcmovu", 2, 0xdad8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
959 {"fcmovae", 2, 0xdbc0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
960 {"fcmovnb", 2, 0xdbc0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
961 {"fcmovne", 2, 0xdbc8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
962 {"fcmova", 2, 0xdbd0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
963 {"fcmovnbe",2, 0xdbd0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
964 {"fcmovnu", 2, 0xdbd8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
966 {"fcomi", 2, 0xdbf0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
967 {"fcomi", 0, 0xdbf1, X, Cpu686, FP|ShortForm, { 0, 0, 0} },
968 {"fcomi", 1, 0xdbf0, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} },
969 {"fucomi", 2, 0xdbe8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
970 {"fucomi", 0, 0xdbe9, X, Cpu686, FP|ShortForm, { 0, 0, 0} },
971 {"fucomi", 1, 0xdbe8, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} },
972 {"fcomip", 2, 0xdff0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
973 {"fcompi", 2, 0xdff0, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
974 {"fcompi", 0, 0xdff1, X, Cpu686, FP|ShortForm, { 0, 0, 0} },
975 {"fcompi", 1, 0xdff0, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} },
976 {"fucomip", 2, 0xdfe8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
977 {"fucomip", 0, 0xdfe9, X, Cpu686, FP|ShortForm, { 0, 0, 0} },
978 {"fucomip", 1, 0xdfe8, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} },
979 {"fucompi", 2, 0xdfe8, X, Cpu686, FP|ShortForm, { FloatReg, FloatAcc, 0} },
980 {"fucompi", 0, 0xdfe9, X, Cpu686, FP|ShortForm, { 0, 0, 0} },
981 {"fucompi", 1, 0xdfe8, X, Cpu686, FP|ShortForm, { FloatReg, 0, 0} },
985 {"movnti", 2, 0x0fc3, X, CpuP4, FP|Modrm, { WordReg, WordMem, 0 } },
986 {"clflush", 1, 0x0fae, 7, CpuP4, FP|Modrm, { ByteMem, 0, 0 } },
987 {"lfence", 0, 0x0fae, 0xe8, CpuP4, FP|ImmExt, { 0, 0, 0 } },
988 {"mfence", 0, 0x0fae, 0xf0, CpuP4, FP|ImmExt, { 0, 0, 0 } },
989 {"pause", 0, 0xf390, X, CpuP4, FP, { 0, 0, 0 } },
993 {"emms", 0, 0x0f77, X, CpuMMX, FP, { 0, 0, 0 } },
998 {"movd", 2, 0x0f6e, X, CpuMMX, FP|Modrm, { Reg32|Reg64|LongMem, RegMMX, 0 } },
999 {"movd", 2, 0x0f7e, X, CpuMMX, FP|Modrm, { RegMMX, Reg32|Reg64|LongMem, 0 } },
1000 {"movd", 2, 0x660f6e,X,CpuSSE2,FP|Modrm, { Reg32|Reg64|LLongMem, RegXMM, 0 } },
1001 {"movd", 2, 0x660f7e,X,CpuSSE2,FP|Modrm, { RegXMM, Reg32|Reg64|LLongMem, 0 } },
1004 {"movq", 2, 0x0f6f, X, CpuMMX, FP|Modrm|NoRex64, { RegMMX|LongMem, RegMMX, 0 } },
1005 {"movq", 2, 0x0f7f, X, CpuMMX, FP|Modrm|NoRex64, { RegMMX, RegMMX|LongMem, 0 } },
1006 {"movq", 2, 0xf30f7e,X,CpuSSE2,FP|Modrm|NoRex64, { RegXMM|LLongMem, RegXMM, 0 } },
1007 {"movq", 2, 0x660fd6,X,CpuSSE2,FP|Modrm|NoRex64, { RegXMM, RegXMM|LLongMem, 0 } },
1008 {"movq", 2, 0x0f6e, X, Cpu64, FP|Modrm, { Reg64|LLongMem, RegMMX, 0 } },
1009 {"movq", 2, 0x0f7e, X, Cpu64, FP|Modrm, { RegMMX, Reg64|LLongMem, 0 } },
1010 {"movq", 2, 0x660f6e,X,Cpu64, FP|Modrm, { Reg64|LLongMem, RegXMM, 0 } },
1011 {"movq", 2, 0x660f7e,X,Cpu64, FP|Modrm, { RegXMM, Reg64|LLongMem, 0 } },
1019 {"packssdw", 2, 0x0f6b, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1020 {"packssdw", 2, 0x660f6b,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1021 {"packsswb", 2, 0x0f63, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1022 {"packsswb", 2, 0x660f63,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1023 {"packuswb", 2, 0x0f67, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1024 {"packuswb", 2, 0x660f67,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1025 {"paddb", 2, 0x0ffc, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1026 {"paddb", 2, 0x660ffc,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1027 {"paddw", 2, 0x0ffd, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1028 {"paddw", 2, 0x660ffd,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1029 {"paddd", 2, 0x0ffe, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1030 {"paddd", 2, 0x660ffe,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1031 {"paddq", 2, 0x0fd4, X, CpuMMX, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
1032 {"paddq", 2, 0x660fd4,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1033 {"paddsb", 2, 0x0fec, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1034 {"paddsb", 2, 0x660fec,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1035 {"paddsw", 2, 0x0fed, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1036 {"paddsw", 2, 0x660fed,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1037 {"paddusb", 2, 0x0fdc, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1038 {"paddusb", 2, 0x660fdc,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1039 {"paddusw", 2, 0x0fdd, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1040 {"paddusw", 2, 0x660fdd,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1041 {"pand", 2, 0x0fdb, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1042 {"pand", 2, 0x660fdb,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1043 {"pandn", 2, 0x0fdf, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1044 {"pandn", 2, 0x660fdf,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1045 {"pcmpeqb", 2, 0x0f74, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1046 {"pcmpeqb", 2, 0x660f74,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1047 {"pcmpeqw", 2, 0x0f75, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1048 {"pcmpeqw", 2, 0x660f75,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1049 {"pcmpeqd", 2, 0x0f76, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1050 {"pcmpeqd", 2, 0x660f76,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1051 {"pcmpgtb", 2, 0x0f64, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1052 {"pcmpgtb", 2, 0x660f64,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1053 {"pcmpgtw", 2, 0x0f65, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1054 {"pcmpgtw", 2, 0x660f65,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1055 {"pcmpgtd", 2, 0x0f66, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1056 {"pcmpgtd", 2, 0x660f66,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1057 {"pmaddwd", 2, 0x0ff5, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1058 {"pmaddwd", 2, 0x660ff5,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1059 {"pmulhw", 2, 0x0fe5, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1060 {"pmulhw", 2, 0x660fe5,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1061 {"pmullw", 2, 0x0fd5, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1062 {"pmullw", 2, 0x660fd5,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1063 {"por", 2, 0x0feb, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1064 {"por", 2, 0x660feb,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1065 {"psllw", 2, 0x0ff1, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1066 {"psllw", 2, 0x660ff1,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1067 {"psllw", 2, 0x0f71, 6, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } },
1068 {"psllw", 2, 0x660f71,6,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } },
1069 {"pslld", 2, 0x0ff2, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1070 {"pslld", 2, 0x660ff2,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1071 {"pslld", 2, 0x0f72, 6, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } },
1072 {"pslld", 2, 0x660f72,6,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } },
1073 {"psllq", 2, 0x0ff3, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1074 {"psllq", 2, 0x660ff3,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1075 {"psllq", 2, 0x0f73, 6, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } },
1076 {"psllq", 2, 0x660f73,6,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } },
1077 {"psraw", 2, 0x0fe1, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1078 {"psraw", 2, 0x660fe1,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1079 {"psraw", 2, 0x0f71, 4, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } },
1080 {"psraw", 2, 0x660f71,4,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } },
1081 {"psrad", 2, 0x0fe2, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1082 {"psrad", 2, 0x660fe2,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1083 {"psrad", 2, 0x0f72, 4, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } },
1084 {"psrad", 2, 0x660f72,4,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } },
1085 {"psrlw", 2, 0x0fd1, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1086 {"psrlw", 2, 0x660fd1,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1087 {"psrlw", 2, 0x0f71, 2, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } },
1088 {"psrlw", 2, 0x660f71,2,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } },
1089 {"psrld", 2, 0x0fd2, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1090 {"psrld", 2, 0x660fd2,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1091 {"psrld", 2, 0x0f72, 2, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } },
1092 {"psrld", 2, 0x660f72,2,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } },
1093 {"psrlq", 2, 0x0fd3, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1094 {"psrlq", 2, 0x660fd3,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1095 {"psrlq", 2, 0x0f73, 2, CpuMMX, FP|Modrm, { Imm8, RegMMX, 0 } },
1096 {"psrlq", 2, 0x660f73,2,CpuSSE2,FP|Modrm, { Imm8, RegXMM, 0 } },
1097 {"psubb", 2, 0x0ff8, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1098 {"psubb", 2, 0x660ff8,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1099 {"psubw", 2, 0x0ff9, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1100 {"psubw", 2, 0x660ff9,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1101 {"psubd", 2, 0x0ffa, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1102 {"psubd", 2, 0x660ffa,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1103 {"psubq", 2, 0x0ffb, X, CpuMMX, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
1104 {"psubq", 2, 0x660ffb,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1105 {"psubsb", 2, 0x0fe8, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1106 {"psubsb", 2, 0x660fe8,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1107 {"psubsw", 2, 0x0fe9, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1108 {"psubsw", 2, 0x660fe9,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1109 {"psubusb", 2, 0x0fd8, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1110 {"psubusb", 2, 0x660fd8,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1111 {"psubusw", 2, 0x0fd9, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1112 {"psubusw", 2, 0x660fd9,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1113 {"punpckhbw",2, 0x0f68, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1114 {"punpckhbw",2, 0x660f68,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1115 {"punpckhwd",2, 0x0f69, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1116 {"punpckhwd",2, 0x660f69,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1117 {"punpckhdq",2, 0x0f6a, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1118 {"punpckhdq",2, 0x660f6a,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1119 {"punpcklbw",2, 0x0f60, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1120 {"punpcklbw",2, 0x660f60,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1121 {"punpcklwd",2, 0x0f61, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1122 {"punpcklwd",2, 0x660f61,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1123 {"punpckldq",2, 0x0f62, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1124 {"punpckldq",2, 0x660f62,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1125 {"pxor", 2, 0x0fef, X, CpuMMX, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1126 {"pxor", 2, 0x660fef,X,CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1130 {"addps", 2, 0x0f58, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1131 {"addss", 2, 0xf30f58, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1132 {"andnps", 2, 0x0f55, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1133 {"andps", 2, 0x0f54, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1134 {"cmpeqps", 2, 0x0fc2, 0, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
1135 {"cmpeqss", 2, 0xf30fc2, 0, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
1136 {"cmpleps", 2, 0x0fc2, 2, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
1137 {"cmpless", 2, 0xf30fc2, 2, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
1138 {"cmpltps", 2, 0x0fc2, 1, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
1139 {"cmpltss", 2, 0xf30fc2, 1, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
1140 {"cmpneqps", 2, 0x0fc2, 4, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
1141 {"cmpneqss", 2, 0xf30fc2, 4, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
1142 {"cmpnleps", 2, 0x0fc2, 6, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
1143 {"cmpnless", 2, 0xf30fc2, 6, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
1144 {"cmpnltps", 2, 0x0fc2, 5, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
1145 {"cmpnltss", 2, 0xf30fc2, 5, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
1146 {"cmpordps", 2, 0x0fc2, 7, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
1147 {"cmpordss", 2, 0xf30fc2, 7, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
1148 {"cmpunordps",2, 0x0fc2, 3, CpuSSE, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
1149 {"cmpunordss",2, 0xf30fc2, 3, CpuSSE, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
1150 {"cmpps", 3, 0x0fc2, X, CpuSSE, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
1151 {"cmpss", 3, 0xf30fc2, X, CpuSSE, FP|Modrm, { Imm8, RegXMM|WordMem, RegXMM } },
1152 {"comiss", 2, 0x0f2f, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1153 {"cvtpi2ps", 2, 0x0f2a, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegXMM, 0 } },
1154 {"cvtps2pi", 2, 0x0f2d, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } },
1157 {"cvttps2pi", 2, 0x0f2c, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } },
1159 {"divps", 2, 0x0f5e, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1160 {"divss", 2, 0xf30f5e, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1161 {"ldmxcsr", 1, 0x0fae, 2, CpuSSE, FP|Modrm, { WordMem, 0, 0 } },
1162 {"maskmovq", 2, 0x0ff7, X, CpuSSE, FP|Modrm, { RegMMX|InvMem, RegMMX, 0 } },
1163 {"maxps", 2, 0x0f5f, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1164 {"maxss", 2, 0xf30f5f, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1165 {"minps", 2, 0x0f5d, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1166 {"minss", 2, 0xf30f5d, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1167 {"movaps", 2, 0x0f28, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1168 {"movaps", 2, 0x0f29, X, CpuSSE, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } },
1169 {"movhlps", 2, 0x0f12, X, CpuSSE, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } },
1170 {"movhps", 2, 0x0f16, X, CpuSSE, FP|Modrm, { LLongMem, RegXMM, 0 } },
1171 {"movhps", 2, 0x0f17, X, CpuSSE, FP|Modrm, { RegXMM, LLongMem, 0 } },
1172 {"movlhps", 2, 0x0f16, X, CpuSSE, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } },
1173 {"movlps", 2, 0x0f12, X, CpuSSE, FP|Modrm, { LLongMem, RegXMM, 0 } },
1174 {"movlps", 2, 0x0f13, X, CpuSSE, FP|Modrm, { RegXMM, LLongMem, 0 } },
1176 {"movntps", 2, 0x0f2b, X, CpuSSE, FP|Modrm, { RegXMM, LLongMem, 0 } },
1177 {"movntq", 2, 0x0fe7, X, CpuSSE, FP|Modrm, { RegMMX, LLongMem, 0 } },
1178 {"movntdq", 2, 0x660fe7, X, CpuSSE2,FP|Modrm, { RegXMM, LLongMem, 0 } },
1179 {"movss", 2, 0xf30f10, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1180 {"movss", 2, 0xf30f11, X, CpuSSE, FP|Modrm, { RegXMM, RegXMM|WordMem, 0 } },
1181 {"movups", 2, 0x0f10, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1182 {"movups", 2, 0x0f11, X, CpuSSE, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } },
1183 {"mulps", 2, 0x0f59, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1184 {"mulss", 2, 0xf30f59, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1185 {"orps", 2, 0x0f56, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1186 {"pavgb", 2, 0x0fe0, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
1187 {"pavgb", 2, 0x660fe0, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1188 {"pavgw", 2, 0x0fe3, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
1189 {"pavgw", 2, 0x660fe3, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1194 {"pmaxsw", 2, 0x0fee, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
1195 {"pmaxsw", 2, 0x660fee, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1196 {"pmaxub", 2, 0x0fde, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
1197 {"pmaxub", 2, 0x660fde, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1198 {"pminsw", 2, 0x0fea, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
1199 {"pminsw", 2, 0x660fea, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1200 {"pminub", 2, 0x0fda, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
1201 {"pminub", 2, 0x660fda, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1204 {"pmulhuw", 2, 0x0fe4, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
1205 {"pmulhuw", 2, 0x660fe4, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1206 {"prefetchnta", 1, 0x0f18, 0, CpuSSE, FP|Modrm, { LLongMem, 0, 0 } },
1207 {"prefetcht0", 1, 0x0f18, 1, CpuSSE, FP|Modrm, { LLongMem, 0, 0 } },
1208 {"prefetcht1", 1, 0x0f18, 2, CpuSSE, FP|Modrm, { LLongMem, 0, 0 } },
1209 {"prefetcht2", 1, 0x0f18, 3, CpuSSE, FP|Modrm, { LLongMem, 0, 0 } },
1210 {"psadbw", 2, 0x0ff6, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
1211 {"psadbw", 2, 0x660ff6, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1212 {"pshufw", 3, 0x0f70, X, CpuSSE, FP|Modrm, { Imm8, RegMMX|LLongMem, RegMMX } },
1213 {"rcpps", 2, 0x0f53, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1214 {"rcpss", 2, 0xf30f53, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1215 {"rsqrtps", 2, 0x0f52, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1216 {"rsqrtss", 2, 0xf30f52, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1217 {"sfence", 0, 0x0fae, 0xf8, CpuSSE, FP|ImmExt, { 0, 0, 0 } },
1218 {"shufps", 3, 0x0fc6, X, CpuSSE, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
1219 {"sqrtps", 2, 0x0f51, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1220 {"sqrtss", 2, 0xf30f51, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1221 {"stmxcsr", 1, 0x0fae, 3, CpuSSE, FP|Modrm, { WordMem, 0, 0 } },
1222 {"subps", 2, 0x0f5c, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1223 {"subss", 2, 0xf30f5c, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1224 {"ucomiss", 2, 0x0f2e, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1225 {"unpckhps", 2, 0x0f15, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1226 {"unpcklps", 2, 0x0f14, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1227 {"xorps", 2, 0x0f57, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1231 {"addpd", 2, 0x660f58, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1232 {"addsd", 2, 0xf20f58, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1233 {"andnpd", 2, 0x660f55, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1234 {"andpd", 2, 0x660f54, X, CpuSSE2, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
1235 {"cmpeqpd", 2, 0x660fc2, 0, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } },
1236 {"cmpeqsd", 2, 0xf20fc2, 0, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } },
1237 {"cmplepd", 2, 0x660fc2, 2, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } },
1238 {"cmplesd", 2, 0xf20fc2, 2, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } },
1239 {"cmpltpd", 2, 0x660fc2, 1, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } },
1240 {"cmpltsd", 2, 0xf20fc2, 1, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } },
1241 {"cmpneqpd", 2, 0x660fc2, 4, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } },
1242 {"cmpneqsd", 2, 0xf20fc2, 4, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } },
1243 {"cmpnlepd", 2, 0x660fc2, 6, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } },
1244 {"cmpnlesd", 2, 0xf20fc2, 6, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } },
1245 {"cmpnltpd", 2, 0x660fc2, 5, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } },
1246 {"cmpnltsd", 2, 0xf20fc2, 5, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } },
1247 {"cmpordpd", 2, 0x660fc2, 7, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } },
1248 {"cmpordsd", 2, 0xf20fc2, 7, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } },
1249 {"cmpunordpd",2, 0x660fc2, 3, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } },
1250 {"cmpunordsd",2, 0xf20fc2, 3, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } },
1251 {"cmppd", 3, 0x660fc2, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
1255 {"cmpsd", 3, 0xf20fc2, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LongMem, RegXMM } },
1256 {"comisd", 2, 0x660f2f, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1257 {"cvtpi2pd", 2, 0x660f2a, X, CpuSSE2, FP|Modrm, { RegMMX|LLongMem, RegXMM, 0 } },
1259 {"divpd", 2, 0x660f5e, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1260 {"divsd", 2, 0xf20f5e, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1261 {"maxpd", 2, 0x660f5f, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1262 {"maxsd", 2, 0xf20f5f, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1263 {"minpd", 2, 0x660f5d, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1264 {"minsd", 2, 0xf20f5d, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1265 {"movapd", 2, 0x660f28, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1266 {"movapd", 2, 0x660f29, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } },
1267 {"movhpd", 2, 0x660f16, X, CpuSSE2, FP|Modrm, { LLongMem, RegXMM, 0 } },
1268 {"movhpd", 2, 0x660f17, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } },
1269 {"movlpd", 2, 0x660f12, X, CpuSSE2, FP|Modrm, { LLongMem, RegXMM, 0 } },
1270 {"movlpd", 2, 0x660f13, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } },
1272 {"movntpd", 2, 0x660f2b, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } },
1276 {"movsd", 2, 0xf20f10, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1277 {"movsd", 2, 0xf20f11, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LongMem, 0 } },
1278 {"movupd", 2, 0x660f10, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1279 {"movupd", 2, 0x660f11, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } },
1280 {"mulpd", 2, 0x660f59, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1281 {"mulsd", 2, 0xf20f59, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1282 {"orpd", 2, 0x660f56, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1283 {"shufpd", 3, 0x660fc6, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
1284 {"sqrtpd", 2, 0x660f51, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1285 {"sqrtsd", 2, 0xf20f51, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1286 {"subpd", 2, 0x660f5c, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1287 {"subsd", 2, 0xf20f5c, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1288 {"ucomisd", 2, 0x660f2e, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1289 {"unpckhpd", 2, 0x660f15, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1290 {"unpcklpd", 2, 0x660f14, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1291 {"xorpd", 2, 0x660f57, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1292 {"cvtdq2pd", 2, 0xf30fe6, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1293 {"cvtpd2dq", 2, 0xf20fe6, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1294 {"cvtdq2ps", 2, 0x0f5b, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1295 {"cvtpd2pi", 2, 0x660f2d, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } },
1296 {"cvtpd2ps", 2, 0x660f5a, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1297 {"cvtps2pd", 2, 0x0f5a, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1298 {"cvtps2dq", 2, 0x660f5b, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1300 {"cvtsd2ss", 2, 0xf20f5a, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1301 {"cvtss2sd", 2, 0xf30f5a, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1302 {"cvttpd2pi", 2, 0x660f2c, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } },
1304 {"cvttpd2dq", 2, 0x660fe6, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1305 {"cvttps2dq", 2, 0xf30f5b, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1306 {"maskmovdqu",2, 0x660ff7, X, CpuSSE2, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } },
1307 {"movdqa", 2, 0x660f6f, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1308 {"movdqa", 2, 0x660f7f, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } },
1309 {"movdqu", 2, 0xf30f6f, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1310 {"movdqu", 2, 0xf30f7f, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } },
1311 {"movdq2q", 2, 0xf20fd6, X, CpuSSE2, FP|Modrm, { RegXMM|InvMem, RegMMX, 0 } },
1312 {"movq2dq", 2, 0xf30fd6, X, CpuSSE2, FP|Modrm, { RegMMX|InvMem, RegXMM, 0 } },
1313 {"pmuludq", 2, 0x0ff4, X, CpuSSE2, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } },
1314 {"pmuludq", 2, 0x660ff4, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } },
1315 {"pshufd", 3, 0x660f70, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
1316 {"pshufhw", 3, 0xf30f70, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
1317 {"pshuflw", 3, 0xf20f70, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
1318 {"pslldq", 2, 0x660f73, 7, CpuSSE2, FP|Modrm, { Imm8, RegXMM, 0 } },
1319 {"psrldq", 2, 0x660f73, 3, CpuSSE2, FP|Modrm, { Imm8, RegXMM, 0 } },
1320 {"punpckhqdq",2, 0x660f6d, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1321 {"punpcklqdq",2, 0x660f6c, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1325 {"addsubpd", 2, 0x660fd0, X, CpuPNI, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1326 {"addsubps", 2, 0xf20fd0, X, CpuPNI, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1330 {"fisttpd", 1, 0xdd, 1, CpuPNI, FP|Modrm, { LLongMem, 0, 0} },
1331 {"fisttpq", 1, 0xdd, 1, CpuPNI, FP|Modrm, { LLongMem, 0, 0} },
1332 {"fisttpll", 1, 0xdd, 1, CpuPNI, FP|Modrm, { LLongMem, 0, 0} },
1333 {"haddpd", 2, 0x660f7c, X, CpuPNI, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1334 {"haddps", 2, 0xf20f7c, X, CpuPNI, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1335 {"hsubpd", 2, 0x660f7d, X, CpuPNI, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1336 {"hsubps", 2, 0xf20f7d, X, CpuPNI, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1337 {"lddqu", 2, 0xf20ff0, X, CpuPNI, FP|Modrm, { LLongMem, RegXMM, 0 } },
1338 {"monitor", 0, 0x0f01, 0xc8, CpuPNI, FP|ImmExt, { 0, 0, 0} },
1340 {"monitor", 3, 0x0f01, 0xc8, CpuPNI, FP|ImmExt, { Reg32, Reg32, Reg32} },
1341 {"movddup", 2, 0xf20f12, X, CpuPNI, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1342 {"movshdup", 2, 0xf30f16, X, CpuPNI, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1343 {"movsldup", 2, 0xf30f12, X, CpuPNI, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
1344 {"mwait", 0, 0x0f01, 0xc9, CpuPNI, FP|ImmExt, { 0, 0, 0} },
1346 {"mwait", 2, 0x0f01, 0xc9, CpuPNI, FP|ImmExt, { Reg32, Reg32, 0} },
1350 {"prefetch", 1, 0x0f0d, 0, Cpu3dnow, FP|Modrm, { ByteMem, 0, 0 } },
1351 {"prefetchw",1, 0x0f0d, 1, Cpu3dnow, FP|Modrm, { ByteMem, 0, 0 } },
1352 {"femms", 0, 0x0f0e, X, Cpu3dnow, FP, { 0, 0, 0 } },
1353 {"pavgusb", 2, 0x0f0f, 0xbf, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1354 {"pf2id", 2, 0x0f0f, 0x1d, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1355 {"pf2iw", 2, 0x0f0f, 0x1c, Cpu3dnow|Cpu686, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1356 {"pfacc", 2, 0x0f0f, 0xae, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1357 {"pfadd", 2, 0x0f0f, 0x9e, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1358 {"pfcmpeq", 2, 0x0f0f, 0xb0, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1359 {"pfcmpge", 2, 0x0f0f, 0x90, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1360 {"pfcmpgt", 2, 0x0f0f, 0xa0, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1361 {"pfmax", 2, 0x0f0f, 0xa4, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1362 {"pfmin", 2, 0x0f0f, 0x94, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1363 {"pfmul", 2, 0x0f0f, 0xb4, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1364 {"pfnacc", 2, 0x0f0f, 0x8a, Cpu3dnow|Cpu686, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1365 {"pfpnacc", 2, 0x0f0f, 0x8e, Cpu3dnow|Cpu686, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1366 {"pfrcp", 2, 0x0f0f, 0x96, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1367 {"pfrcpit1", 2, 0x0f0f, 0xa6, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1368 {"pfrcpit2", 2, 0x0f0f, 0xb6, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1369 {"pfrsqit1", 2, 0x0f0f, 0xa7, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1370 {"pfrsqrt", 2, 0x0f0f, 0x97, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1371 {"pfsub", 2, 0x0f0f, 0x9a, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1372 {"pfsubr", 2, 0x0f0f, 0xaa, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1373 {"pi2fd", 2, 0x0f0f, 0x0d, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1374 {"pi2fw", 2, 0x0f0f, 0x0c, Cpu3dnow|Cpu686, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1375 {"pmulhrw", 2, 0x0f0f, 0xb7, Cpu3dnow, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1376 {"pswapd", 2, 0x0f0f, 0xbb, Cpu3dnow|Cpu686, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
1394 {"pshufb", 2, 0x660f3800, X, CpuSSSE3, FP|Modrm|IgnoreSize|NoSuf, { RegXMM|LLongMem, RegXMM } },
1397 {"aesdec", 2, 0x660f38de, X, CpuAES, FP|Modrm|IgnoreSize|NoSuf, { RegXMM|LLongMem, RegXMM } },
1398 {"aesdeclast", 2, 0x660f38df, X, CpuAES, FP|Modrm|IgnoreSize|NoSuf, { RegXMM|LLongMem, RegXMM } },
1399 {"aesenc", 2, 0x660f38dc, X, CpuAES, FP|Modrm|IgnoreSize|NoSuf, { RegXMM|LLongMem, RegXMM } },
1400 {"aesenclast", 2, 0x660f38dd, X, CpuAES, FP|Modrm|IgnoreSize|NoSuf, { RegXMM|LLongMem, RegXMM } },
1401 {"aesimc", 2, 0x660f38db, X, CpuAES, FP|Modrm|IgnoreSize|NoSuf, { RegXMM|LLongMem, RegXMM } },
1402 {"aeskeygenassist", 3, 0x660f3adf, X, CpuAES, FP|Modrm|IgnoreSize|NoSuf, { Imm8, RegXMM|LLongMem, R…
1405 {"pclmulqdq", 3, 0x660f3a44, X, CpuPCLMUL, FP|Modrm|IgnoreSize|NoSuf, { Imm8, RegXMM|LLongMem, RegX…
1406 {"pclmullqlqdq", 2, 0x660f3a44, 0x0, CpuPCLMUL, FP|Modrm|IgnoreSize|NoSuf|ImmExt, { RegXMM|LLongMem…
1407 {"pclmulhqlqdq", 2, 0x660f3a44, 0x1, CpuPCLMUL, FP|Modrm|IgnoreSize|NoSuf|ImmExt, { RegXMM|LLongMem…
1408 {"pclmullqhqdq", 2, 0x660f3a44, 0x10, CpuPCLMUL, FP|Modrm|IgnoreSize|NoSuf|ImmExt, { RegXMM|LLongMe…
1409 {"pclmulhqhqdq", 2, 0x660f3a44, 0x11, CpuPCLMUL, FP|Modrm|IgnoreSize|NoSuf|ImmExt, { RegXMM|LLongMe…
1473 #undef FP