Lines Matching refs:Add

32 	* arm.h: Add V7 feature bits.
36 * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.
56 * i386.h (i386_optab): Add 64bit support for monitor and mwait.
106 * hppa.h (pa_opcodes): Add two fcmp opcodes. Reorder ftest opcodes.
107 Add FLAG_STRICT to pa10 ftest opcode.
116 (pa_opcode): Revise ordering rules. Add/move strict pa10 variants
117 before corresponding pa11 opcodes. Add strict pa10 register-immediate
122 * hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries.
154 * s390.h (s390_opcode_cpu_val): Add enum for cpu type z9-109.
164 * i386.h (i386_optab): Add comment to movd. Use LongMem for all
165 movd-s. Add NoRex64 to movq-s dealing only with mmx or xmm registers.
166 Add movq-s as 64-bit variants of movd-s.
172 * hppa.h (pa_opcode): Add rules for opcode ordering. Check first for
174 using implicit space-register addressing. Add various missing pa20
193 * i386.h (i386_optab): Add new insns.
197 * sparc.h: Add typedefs to structure declarations.
234 * i386.h (i386_optab): Add ht and hnt.
239 Add xcrypt-ctr. Provide aliases without hyphens.
250 Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
271 (instruction type): Add NO_TYPE_INS.
272 (instruction flags): Add USER_REG, CST4MAP, NO_SP, NO_RPTR.
279 Add new unsigned immediate types us3, us4, us5, us16.
288 * i386.h (i386_optab): Add rdtscp.
299 * i386.h (i386_optab): Add x_Suf to fbld and fbstp. Add w_Suf and
309 mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.
314 * cgen.h (enum cgen_parse_operand_type): Add
325 * mips.h (struct mips_opcode): Add new pinfo2 member.
340 to/from test registers are illegal in 64-bit mode. Add missing
344 support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
371 comments. Remove member cris_ver_sim. Add members
394 changes to the *FP macros. Add DefaultSize to floating point control
401 * crx.h: Add COPS_REG_INS - Coprocessor Special register
411 * avr.h: Add support for
420 * msp430.h (msp430_opc): Add new instructions.
462 * m68k.h: Add 'size' to m68k_opcode.
470 * m68k.h: Add mcfmac/mcfemac definitions. Update operand
494 * h8300.h (32bit ldc/stc): Add relaxing support.