Lines Matching refs:MachineBasicBlock
131 MachineBasicBlock *getMBBTarget() { in getMBBTarget()
164 MachineBasicBlock *emitBlockAfter(MachineBasicBlock *MBB);
167 MachineBasicBlock *splitBlockAfter(MachineBasicBlock::iterator MI,
168 MachineBasicBlock *MBB);
170 MachineBasicBlock *splitBlockBefore(MachineBasicBlock::iterator MI,
171 MachineBasicBlock *MBB);
178 void splitMove(MachineBasicBlock::iterator MI, unsigned NewOpcode) const;
179 void splitAdjDynAlloc(MachineBasicBlock::iterator MI) const;
193 emitGRX32Move(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
226 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
227 MachineBasicBlock *&FBB,
230 unsigned removeBranch(MachineBasicBlock &MBB,
232 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
233 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
239 bool canInsertSelect(const MachineBasicBlock &, ArrayRef<MachineOperand> Cond,
242 void insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
249 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
252 bool isProfitableToIfCvt(MachineBasicBlock &TMBB,
254 MachineBasicBlock &FMBB,
257 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
261 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
264 void storeRegToStackSlot(MachineBasicBlock &MBB,
265 MachineBasicBlock::iterator MBBI, Register SrcReg,
270 void loadRegFromStackSlot(MachineBasicBlock &MBB,
271 MachineBasicBlock::iterator MBBI, Register DestReg,
280 MachineBasicBlock::iterator InsertPt, int FrameIndex,
285 MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
341 bool prepareCompareSwapOperands(MachineBasicBlock::iterator MBBI) const;
349 void loadImmediate(MachineBasicBlock &MBB,
350 MachineBasicBlock::iterator MBBI,