90 void PPCInstrInfo::anchor() {}  in anchor()
92 PPCInstrInfo::PPCInstrInfo(PPCSubtarget &STI)  in PPCInstrInfo()  function in PPCInstrInfo
101 PPCInstrInfo::CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,  in CreateTargetHazardRecognizer()
118 PPCInstrInfo::CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II,  in CreateTargetPostRAHazardRecognizer()
138 unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,  in getInstrLatency()
168 int PPCInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,  in getOperandLatency()
223 void PPCInstrInfo::setSpecialOperandAttr(MachineInstr &OldMI1,  in setSpecialOperandAttr()
241 void PPCInstrInfo::setSpecialOperandAttr(MachineInstr &MI,  in setSpecialOperandAttr()
254 bool PPCInstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst,  in isAssociativeAndCommutative()
317 int16_t PPCInstrInfo::getFMAOpIdxInfo(unsigned Opcode) const {  in getFMAOpIdxInfo()
372 bool PPCInstrInfo::getFMAPatterns(  in getFMAPatterns()
547 void PPCInstrInfo::finalizeInsInstrs(  in finalizeInsInstrs()
617 bool PPCInstrInfo::shouldReduceRegisterPressure(  in shouldReduceRegisterPressure()
677 bool PPCInstrInfo::isLoadFromConstantPool(MachineInstr *I) const {  in isLoadFromConstantPool()
687 Register PPCInstrInfo::generateLoadForNewConst(  in generateLoadForNewConst()
741 PPCInstrInfo::getConstantFromConstantPool(MachineInstr *I) const {  in getConstantFromConstantPool()
761 bool PPCInstrInfo::getMachineCombinerPatterns(  in getMachineCombinerPatterns()
776 void PPCInstrInfo::genAlternativeCodeSequence(  in genAlternativeCodeSequence()
796 void PPCInstrInfo::reassociateFMA(  in reassociateFMA()
1056 bool PPCInstrInfo::isCoalescableExtInstr(const MachineInstr &MI,  in isCoalescableExtInstr()
1071 unsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,  in isLoadFromStackSlot()
1087 bool PPCInstrInfo::isReallyTriviallyReMaterializable(  in isReallyTriviallyReMaterializable()
1127 unsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr &MI,  in isStoreToStackSlot()
1139 MachineInstr *PPCInstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI,  in commuteInstructionImpl()
1223 bool PPCInstrInfo::findCommutedOpIndices(const MachineInstr &MI,  in findCommutedOpIndices()
1239 void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB,  in insertNoop()
1259 MCInst PPCInstrInfo::getNop() const {  in getNop()
1268 bool PPCInstrInfo::analyzeBranch(MachineBasicBlock &MBB,  in analyzeBranch()
1443 unsigned PPCInstrInfo::removeBranch(MachineBasicBlock &MBB,  in removeBranch()
1475 unsigned PPCInstrInfo::insertBranch(MachineBasicBlock &MBB,  in insertBranch()
1528 bool PPCInstrInfo::canInsertSelect(const MachineBasicBlock &MBB,  in canInsertSelect()
1571 void PPCInstrInfo::insertSelect(MachineBasicBlock &MBB,  in insertSelect()
1683 void PPCInstrInfo::copyPhysReg(MachineBasicBlock &MBB,  in copyPhysReg()
1866 unsigned PPCInstrInfo::getSpillIndex(const TargetRegisterClass *RC) const {  in getSpillIndex()
1920 PPCInstrInfo::getStoreOpcodeForSpill(const TargetRegisterClass *RC) const {  in getStoreOpcodeForSpill()
1926 PPCInstrInfo::getLoadOpcodeForSpill(const TargetRegisterClass *RC) const {  in getLoadOpcodeForSpill()
1931 void PPCInstrInfo::StoreRegToStackSlot(  in StoreRegToStackSlot()
1953 void PPCInstrInfo::storeRegToStackSlotNoUpd(  in storeRegToStackSlotNoUpd()
1973 void PPCInstrInfo::storeRegToStackSlot(  in storeRegToStackSlot()
1988 void PPCInstrInfo::LoadRegFromStackSlot(MachineFunction &MF, const DebugLoc &DL,  in LoadRegFromStackSlot()
2006 void PPCInstrInfo::loadRegFromStackSlotNoUpd(  in loadRegFromStackSlotNoUpd()
2031 void PPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,  in loadRegFromStackSlot()
2049 bool PPCInstrInfo::
2063 bool PPCInstrInfo::onlyFoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,  in onlyFoldImmediate()
2134 bool PPCInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,  in FoldImmediate()
2155 bool PPCInstrInfo::isProfitableToIfCvt(MachineBasicBlock &TMBB,  in isProfitableToIfCvt()
2164 bool PPCInstrInfo::isPredicated(const MachineInstr &MI) const {  in isPredicated()
2175 bool PPCInstrInfo::isSchedulingBoundary(const MachineInstr &MI,  in isSchedulingBoundary()
2186 bool PPCInstrInfo::PredicateInstruction(MachineInstr &MI,  in PredicateInstruction()
2290 bool PPCInstrInfo::SubsumesPredicate(ArrayRef<MachineOperand> Pred1,  in SubsumesPredicate()
2321 bool PPCInstrInfo::ClobbersPredicate(MachineInstr &MI,  in ClobbersPredicate()
2356 bool PPCInstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg,  in analyzeCompare()
2386 bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,  in optimizeCompareInstr()
2771 bool PPCInstrInfo::optimizeCmpPostRA(MachineInstr &CmpMI) const {  in optimizeCmpPostRA()
2850 bool PPCInstrInfo::getMemOperandsWithOffsetWidth(  in getMemOperandsWithOffsetWidth()
2901 bool PPCInstrInfo::shouldClusterMemOps(  in shouldClusterMemOps()
2959 unsigned PPCInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {  in getInstSizeInBytes()
2978 PPCInstrInfo::decomposeMachineOperandsTargetFlags(unsigned TF) const {  in decomposeMachineOperandsTargetFlags()
2984 PPCInstrInfo::getSerializableDirectMachineOperandTargetFlags() const {  in getSerializableDirectMachineOperandTargetFlags()
2999 PPCInstrInfo::getSerializableBitmaskMachineOperandTargetFlags() const {  in getSerializableBitmaskMachineOperandTargetFlags()
3023 bool PPCInstrInfo::expandVSXMemPseudo(MachineInstr &MI) const {  in expandVSXMemPseudo()
3089 bool PPCInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {  in expandPostRAPseudo()
3252 void PPCInstrInfo::replaceInstrOperandWithImm(MachineInstr &MI,  in replaceInstrOperandWithImm()
3283 void PPCInstrInfo::replaceInstrWithLI(MachineInstr &MI,  in replaceInstrWithLI()
3306 MachineInstr *PPCInstrInfo::getDefMIPostRA(unsigned Reg, MachineInstr &MI,  in getDefMIPostRA()
3323 void PPCInstrInfo::materializeImmPostRA(MachineBasicBlock &MBB,  in materializeImmPostRA()
3364 MachineInstr *PPCInstrInfo::getForwardingDefMI(  in getForwardingDefMI()
3453 unsigned PPCInstrInfo::getSpillTarget() const {  in getSpillTarget()
3462 ArrayRef<unsigned> PPCInstrInfo::getStoreOpcodesForSpillArray() const {  in getStoreOpcodesForSpillArray()
3466 ArrayRef<unsigned> PPCInstrInfo::getLoadOpcodesForSpillArray() const {  in getLoadOpcodesForSpillArray()
3470 void PPCInstrInfo::fixupIsDeadOrKill(MachineInstr *StartMI, MachineInstr *EndMI,  in fixupIsDeadOrKill()
3589 bool PPCInstrInfo::foldFrameOffset(MachineInstr &MI) const {  in foldFrameOffset()
3686 bool PPCInstrInfo::isADDIInstrEligibleForFolding(MachineInstr &ADDIMI,  in isADDIInstrEligibleForFolding()
3703 bool PPCInstrInfo::isADDInstrEligibleForFolding(MachineInstr &ADDMI) const {  in isADDInstrEligibleForFolding()
3710 bool PPCInstrInfo::isImmInstrEligibleForFolding(MachineInstr &MI,  in isImmInstrEligibleForFolding()
3753 bool PPCInstrInfo::isValidToBeChangedReg(MachineInstr *ADDMI, unsigned Index,  in isValidToBeChangedReg()
3798 bool PPCInstrInfo::convertToImmediateForm(MachineInstr &MI,  in convertToImmediateForm()
3850 bool PPCInstrInfo::combineRLWINM(MachineInstr &MI,  in combineRLWINM()
3987 bool PPCInstrInfo::instrHasImmForm(unsigned Opc, bool IsVFReg,  in instrHasImmForm()
4449 bool PPCInstrInfo::isUseMIElgibleForForwarding(MachineInstr &MI,  in isUseMIElgibleForForwarding()
4487 bool PPCInstrInfo::isDefMIElgibleForForwarding(MachineInstr &DefMI,  in isDefMIElgibleForForwarding()
4510 bool PPCInstrInfo::isRegElgibleForForwarding(  in isRegElgibleForForwarding()
4551 bool PPCInstrInfo::isImmElgibleForForwarding(const MachineOperand &ImmMO,  in isImmElgibleForForwarding()
4603 bool PPCInstrInfo::simplifyToLI(MachineInstr &MI, MachineInstr &DefMI,  in simplifyToLI()
4846 bool PPCInstrInfo::transformToNewImmFormFedByAdd(  in transformToNewImmFormFedByAdd()
4948 bool PPCInstrInfo::transformToImmFormFedByAdd(  in transformToImmFormFedByAdd()
5061 bool PPCInstrInfo::transformToImmFormFedByLI(MachineInstr &MI,  in transformToImmFormFedByLI()
5222 PPCInstrInfo::updatedRC(const TargetRegisterClass *RC) const {  in updatedRC()
5228 int PPCInstrInfo::getRecordFormOpcode(unsigned Opcode) {  in getRecordFormOpcode()
5250   const PPCInstrInfo *TII =  in definedBySignExtendingOp()
5297   const PPCInstrInfo *TII =  in definedByZeroExtendingOp()
5341 bool PPCInstrInfo::isTOCSaveMI(const MachineInstr &MI) const {  in isTOCSaveMI()
5363 PPCInstrInfo::isSignOrZeroExtended(const unsigned Reg,  in isSignOrZeroExtended()
5531 bool PPCInstrInfo::isBDNZ(unsigned Opcode) const {  in isBDNZ()
5605 PPCInstrInfo::analyzeLoopForPipelining(MachineBasicBlock *LoopBB) const {  in analyzeLoopForPipelining()
5625 MachineInstr *PPCInstrInfo::findLoopInstr(  in findLoopInstr()
5640 bool PPCInstrInfo::getMemOperandWithOffsetWidth(  in getMemOperandWithOffsetWidth()
5663 bool PPCInstrInfo::areMemAccessesTriviallyDisjoint(  in areMemAccessesTriviallyDisjoint()