Lines Matching refs:RegisterVT

899   unsigned &NumIntermediates, MVT &RegisterVT) const {  in getVectorTypeBreakdownForCallingConv()
909         RegisterVT = MVT::i32;  in getVectorTypeBreakdownForCallingConv()
912         RegisterVT = VT.isInteger() ? MVT::v2i16 : MVT::v2f16;  in getVectorTypeBreakdownForCallingConv()
913         IntermediateVT = RegisterVT;  in getVectorTypeBreakdownForCallingConv()
920       RegisterVT = ScalarVT.getSimpleVT();  in getVectorTypeBreakdownForCallingConv()
921       IntermediateVT = RegisterVT;  in getVectorTypeBreakdownForCallingConv()
928       RegisterVT = MVT::i16;  in getVectorTypeBreakdownForCallingConv()
936       RegisterVT = MVT::i32;  in getVectorTypeBreakdownForCallingConv()
943       RegisterVT = MVT::i32;  in getVectorTypeBreakdownForCallingConv()
944       IntermediateVT = RegisterVT;  in getVectorTypeBreakdownForCallingConv()
951     Context, CC, VT, IntermediateVT, NumIntermediates, RegisterVT);  in getVectorTypeBreakdownForCallingConv()