Lines Matching refs:OutputBecomesInput

11218   bool OutputBecomesInput = false;  in getNDSWDS()  local
11224 OutputBecomesInput = true; in getNDSWDS()
11243 OutputBecomesInput); in getNDSWDS()
11252 StringRef MangledName, bool OutputBecomesInput, in addAArch64VectorName() argument
11257 if (OutputBecomesInput) in addAArch64VectorName()
11268 bool OutputBecomesInput, in addAArch64AdvSIMDNDSNames() argument
11273 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11275 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11279 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11281 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11285 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11287 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11292 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
11310 const bool OutputBecomesInput = std::get<2>(Data); in emitAArch64DeclareSimdFunction() local
11354 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11362 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11364 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11368 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11372 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11382 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11391 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11393 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11397 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
11401 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()